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74AC14PC_Q

Description
hex inverter
Categorysemiconductor    Other integrated circuit (IC)   
File Size89KB,8 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
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74AC14PC_Q Overview

hex inverter

74AC14PC_Q Parametric

Parameter NameAttribute value
MakerFairchild
RoHSno
Number of circuits6
logic series74AC
logical typeInverte
High level output current- 24 mA
Low level output current24 mA
propagation delay time13.5 ns @ 3.3 V or 10 ns @ 5 V
Supply voltage (maximum)6 V
Supply voltage (minimum)2 V
Maximum operating temperature+ 85 C
Minimum operating temperature- 40 C
Package/boxPDIP-14
EncapsulationTube
input typeSchmitt Trigge
Installation styleThrough Hole
Working power voltage2 V to 6 V
Output typeSchmitt Trigge
74AC14 • 74ACT14 Hex Inverter with Schmitt Trigger Input
November 1988
Revised December 1999
74AC14 • 74ACT14
Hex Inverter with Schmitt Trigger Input
General Description
The 74AC14 and 74ACT14 contain six inverter gates each
with a Schmitt trigger input. They are capable of transform-
ing slowly changing input signals into sharply defined, jitter-
free output signals. In addition, they have a greater noise
margin than conventional inverters.
The 74AC14 and 74ACT14 have hysteresis between the
positive-going and negative-going input thresholds (typi-
cally 1.0V) which is determined internally by transistor
ratios and is essentially insensitive to temperature and sup-
ply voltage variations.
Features
s
I
CC
reduced by 50%
s
Outputs source/sink 24 mA
s
74ACT14 has TTL-compatible inputs
Ordering Code:
Order Number
74AC14SC
74AC14SJ
74AC14MTC
74AC14PC
74ACT14SC
74ACT14MTC
74ACT14PC
Package Number
M14A
M14D
MTC14
N14A
M14A
MTC14
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MS-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MS-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Function Table
Pin Descriptions
Pin Names
I
n
O
n
Description
Inputs
Outputs
Input
A
L
H
Output
O
H
L
FACT is a trademark of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
DS009917
www.fairchildsemi.com
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