HD74AC74
Dual D-Type Positive Edge-Triggered Flip-Flop
REJ03D0277–0200Z
(Previous ADE-205-361 (Z))
Rev.2.00
Jul.16.2004
Description
The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,
Q)
outputs.
Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a
voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the
Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be
transferred to the outputs until the next rising edge of the Clock Pulse input.
Features
Asynchronous Inputs:
Low input to
S
D
(Set) sets Q to High level
Low input to
C
D
(Clear) sets Q to Low level
Clear and Set are independent of clock
Simultaneous Low on
C
D
and
S
D
makes both Q and
Q
High
•
Outputs Source/Sink 24 mA
•
Ordering Information
Part Name
HD74AC74P
HD74AC74FPEL
HD74AC74RPEL
HD74AC74TELL
Package Type
DIP-14 pin
SOP-14 pin (JEITA)
SOP-14 pin (JEDEC)
TSSOP-14 pin
Package Code Package Abbreviation Taping Abbreviation (Quantity)
DP-14, -14AV
FP-14DAV
FP-14DNV
TTP-14DV
P
FP
RP
T
—
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Notes: 1. Please consult the sales office for the above package availability.
2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of
the package code.
Pin Arrangement
C
D1
1
D
1
2
CP
1
3
S
D1
4
Q
1
5
Q
1
6
GND 7
D
2
C
D2
CP
2
S
D2
CP
1
D
1
S
D1
C
D1
14 V
CC
13
C
D2
12 D
2
11 CP
2
10
S
D2
9 Q
2
8
Q
2
Q
1
Q
1
Q
2
Q
2
(Top view)
Rev.2.00, Jul.16.2004, page 1 of 7
HD74AC74
Logic Symbol
D
1
S
D1
Q
1
D
2
S
D2
Q
2
CP
1
Q
1
CP
2
Q
2
C
D1
C
D2
Pin Names
D
1
, D
2
CP
1
, CP
2
C
D1
,
C
D2
S
D1
,
S
D2
Q
1
,
Q
1
, Q
2
,
Q
2
Data Inputs
Clock Pulse Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
Truth Table
(Each Half)
Inputs
S
D
L
H
L
H
H
H
H
L
X
C
D
X
X
X
CP
X
X
X
H
L
X
D
H
L
H
H
L
Q
0
Outputs
Q
L
H
H
L
H
Q
0
Q
:
:
:
:
H
L
L
H
H
H
High Voltage Level
Low Voltage Level
Immaterial
Low-to-High Clock Transition
L
Q
0
(Q
0
) :
Previous Q (Q) before Low-to-High Transition of Clock
Logic Diagram
S
D
D
CP
Q
Q
C
D
Please note that this diagram is provised only for the understanding of logic operations and should not be
used to estimate propagation delays.
Rev.2.00, Jul.16.2004, page 2 of 7
HD74AC74
Absolute Maximum Ratings
Item
Supply voltage
DC input diode current
DC input voltage
DC output diode current
DC output voltage
DC output source or sink current
DC V
CC
or ground current per output pin
Storage temperature
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
, I
GND
Tstg
Ratings
–0.5 to 7
–20
20
–0.5 to Vcc+0.5
–50
50
–0.5 to Vcc+0.5
±50
±50
–65 to +150
Unit
V
mA
mA
V
mA
mA
V
mA
mA
°C
Condition
V
I
= –0.5V
V
I
= Vcc+0.5V
V
O
= –0.5V
V
O
= Vcc+0.5V
Recommended Operating Conditions
Item
Supply voltage
Input and output voltage
Operating temperature
Input rise and fall time
(except Schmitt inputs)
V
IN
30% to 70% V
CC
Symbol
V
CC
V
I
, V
O
Ta
tr, tf
Ratings
2 to 6
0 to V
CC
–40 to +85
8
V
V
°C
ns/V
V
CC
= 3.0V
V
CC
= 4.5 V
V
CC
= 5.5 V
Unit
Condition
DC Characteristics
Item
Sym-
bol
V
IH
Vcc
(V)
3.0
4.5
5.5
V
IL
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
V
OL
5.5
3.0
4.5
5.5
3.0
4.5
Input leakage
current
Dynamic output
current*
I
IN
I
OLD
I
OHD
5.5
5.5
5.5
5.5
min.
2.1
3.15
3.85
—
—
—
2.9
4.4
5.4
2.58
3.94
4.94
—
—
—
—
—
—
—
—
—
Ta = 25°C
°
typ.
1.5
2.25
2.75
1.50
2.25
2.75
2.99
4.49
5.49
—
—
—
0.002
0.001
0.001
—
—
—
—
—
—
max.
—
—
—
0.9
1.35
1.65
—
—
—
—
—
—
0.1
0.1
0.1
0.32
0.32
0.32
±0.1
—
—
Ta = –40 to
+85°C
°
min.
2.1
3.15
3.85
—
—
—
2.9
4.4
5.4
2.48
3.80
4.80
—
—
—
—
—
—
—
86
–75
—
max.
—
—
—
0.9
1.35
1.65
—
—
—
—
—
—
0.1
0.1
0.1
0.37
0.37
0.37
±1.0
—
—
40
µA
mA
mA
µA
V
V
OUT
= 0.1 V or V
CC
–0.1 V
Unit
Condition
Input Voltage
V
V
OUT
= 0.1 V or V
CC
–0.1 V
Output voltage
V
OH
V
IN
= V
IL
or V
IH
I
OUT
= –50
µA
V
IN
= V
IL
or V
IH
I
OH
= –12 mA
I
OH
= –24 mA
I
OH
= –24 mA
V
IN
= V
IL
or V
IH
I
OUT
= 50
µA
V
IN
= V
IL
or V
IH
I
OL
= 12 mA
I
OL
= 24 mA
I
OL
= 24 mA
V
IN
= V
CC
or GND
V
OLD
= 1.1 V
V
OHD
= 3.85 V
V
IN
= V
CC
or ground
Quiescent supply
5.5
—
—
4.0
I
CC
current
*Maximum
test duration 2.0 ms, one output loaded at a time.
Rev.2.00, Jul.16.2004, page 3 of 7
HD74AC74
AC Characteristics
Ta = +25°C
C
L
= 50 pF
Item
Maximum clock
frequency
Propagation delay
C
Dn
or
S
Dn
to Q
n
or
Q
n
Propagation delay
C
Dn
or
S
Dn
to Q
n
or
Q
n
Propagation delay
CP
n
to Q
n
or
Q
n
Propagation delay
CP
n
to Q
n
or
Q
n
Note:
Symbol
f
max
t
PLH
t
PHL
t
PLH
t
PHL
V
CC
(V)*
1
Min
3.3
100
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
140
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ
125
160
8.0
6.0
10.5
8.0
8.0
6.0
8.0
6.0
Max
—
—
12.0
9.0
12.0
9.5
13.5
10.0
14.0
10.0
Ta = –40°C to +85°C
C
L
= 50 pF
Min
95
125
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
—
—
13.0
10.0
13.5
10.5
16.0
10.5
14.5
10.5
Max
MHz
ns
ns
ns
ns
Unit
1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Operating Requirements
Ta = +25°C
C
L
= 50 pF
Item
Set-up time, HIGH or LOW
D
n
to CP
n
Hold time, HIGH or LOW
D
n
to CP
n
CP
n
or
C
Dn
or
S
Dn
Pulse width
Recovery time
Symbol V
CC
(V)*
1
Typ
t
su
3.3
1.5
t
h
t
w
t
rec
5.0
3.3
5.0
3.3
5.0
3.3
1.0
–2.0
–1.5
3.0
2.5
–2.5
–2.0
Ta = –40°C
to +85°C
C
L
= 50 pF
Unit
ns
ns
ns
ns
Guaranteed Minimum
4.0
4.5
3.0
0
0
5.5
4.5
0
0
3.0
0
0
7.0
5.0
0
0
5.0
C
Dn
or
S
Dn
to CP
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item
Input capacitance
Power dissipation capacitance
Symbol
C
IN
C
PD
4.5
35.0
Typ
pF
pF
Unit
V
CC
= 5.5 V
V
CC
= 5.0 V
Condition
Rev.2.00, Jul.16.2004, page 4 of 7
HD74AC74
Package Dimensions
As of January, 2003
19.20
20.32 Max
14
8
Unit: mm
1
2.39 Max
1.30
7
7.62
6.30
7.40 Max
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
0.48 ± 0.10
0.25
– 0.05
0˚ – 15˚
+ 0.10
Package Code
JEDEC
JEITA
Mass (reference value)
DP-14
Conforms
Conforms
0.97 g
19.20
20.32 Max
14
8
Unit: mm
1
2.39 Max
1.30
7
7.62
6.30
7.40 Max
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
*0.48 ± 0.08
*0.25 ± 0.06
0˚ – 15˚
*NI/Pd/AU Plating
Package Code
JEDEC
JEITA
Mass (reference value)
DP-14AV
Conforms
Conforms
0.97 g
Rev.2.00, Jul.16.2004, page 5 of 7
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