INTEGRATED CIRCUITS
DATA SHEET
TDA4566
Colour transient improvement
circuit
Preliminary specification
File under Integrated Circuits, IC02
March 1991
Philips Semiconductors
Preliminary specification
Colour transient improvement circuit
GENERAL DESCRIPTION
TDA4566
The TDA4566 is a monolithic integrated circuit for colour-transient improvement (CTI) and luminance delay line in gyrator
technique in colour television receivers.
Features
•
Colour transient improvement for colour difference signals (R-Y) and (B-Y) with transient detecting-, storage- and
switching stages resulting in high transients of colour difference output signals
•
A luminance signal path (Y) which substitutes the conventional Y-delay coil with an integrated Y-delay line
•
Switchable delay time from 550 ns to 820 ns in steps of 90 ns and additional fine adjustment of 37 ns
•
Two Y output signals; one of 180 ns less delay
QUICK REFERENCE DATA
PARAMETER
Supply voltage (pin 10)
Supply current (pin 10)
Y-signal delay at pin 12
S1 open;
R
14-18
= 1.2 kΩ;
note 1
t
17-12
t
17-12
t
17-12
t
17-12
0.5 MHz
α
Y
α
cd
t
tr
490
580
670
760
0
−1
−
550
640
730
820
1
0
100
610
700
790
880
2
+1
200
ns
ns
ns
ns
dB
dB
ns
CONDITIONS
V
P
I
P
SYMBOL
−
MIN.
10.8
TYP.
12
35
MAX.
13.2
50
UNIT
V
mA
V
15-18
= 0 to 2.5 V
V
15-18
= 3.5 to 5.5 V
V
15-18
= 6.5 to 8.5 V
V
15-18
= 9.5 to12 V
Y-signal amplification
(R-Y) and (B-Y) signal
attenuation
output transient time
Note
1. Delay time is proportional to resistor R
14-18
.
R
14-18
also influences the bandwidth; a value of 1.2 kΩ results in a bandwidth of 5 MHz (typ.).
PACKAGE OUTLINE
18-lead DIL; plastic (SOT102); SOT102-1; 1996 November 27.
March 1991
2
Philips Semiconductors
Preliminary specification
Colour transient improvement circuit
TDA4566
March 1991
3
Fig.1 Block diagram.
Philips Semiconductors
Preliminary specification
Colour transient improvement circuit
TDA4566
March 1991
4
Fig.2 Internal pin circuit diagram.
Philips Semiconductors
Preliminary specification
Colour transient improvement circuit
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
PARAMETER
Supply voltage range (pin 10)
Voltage ranges to pin 18 (ground)
at pins 1, 2, 12 and 15
at pin 11
at pin 17
Voltage ranges
at pin 7 to pin 6
at pin 8 to pin 9
Currents
at pins 6, 9
at pins 7, 8, 11 and 12
Total power dissipation
(T
j
= 150
°C;
T
amb
= 70
°C
Storage temperature range
Operating ambient temperature range
THERMAL RESISTANCE
From junction to ambient (in free air)
Note
1. Pins 3, 4, 5, 6, 9, 13 and 14 DC potential not published.
R
th j−a
P
tot
T
stg
T
amb
−
−25
0
1.1
+
150
+
70
I
6, 9
I
7, 8, 11, 12
−10
+10
V
7-6
V
8-9
0
0
5
5
V
n-18
V
11-18
V
17-18
0
0
0
V
P
(V
P
−3
V)
7
SYMBOL
V
P
= V
10-18
0
MIN.
MAX.
13.2
TDA4566
UNIT
V
V
V
V
V
V
mA
internally limited
W
°C
°C
= 70
K/W
March 1991
5
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