CS4202
Audio Codec ’97 with Headphone Amplifier
Features
AC ’97 2.2 Compliant
Exceeds the Microsoft
PC 2001 Audio
Performance Requirements
Integrated High-Performance Headphone
Amplifier
On-chip PLL for use with External Clock
Sources
Integrated High-Performance Microphone
Pre-Amplifier
Automatic Jack Sense through GPIO
BIOS-Driver Interface for Audio Feature
Configuration through Software
S/PDIF Digital Audio Output
I
2
S Serial Digital Outputs Enable Cost
Effective Six Channel Applications
Independent Simultaneous S/PDIF and Six
Channel Audio Playback
20-bit Stereo Digital-to-Analog Converters
18-bit Stereo Analog-to-Digital Converters
Sample Rate Converters
Three Analog Line-level Stereo Inputs
High Quality Pseudo-Differential CD Input
Two Analog Line-level Mono Inputs
Dual Microphone Inputs
Stereo and Mono Line-level Outputs
Extensive Power Management Support
Description
The CS4202 is an AC ’97 2.2 compliant stereo audio co-
dec designed for PC multimedia systems. It uses
industry leading delta-sigma and mixed signal technolo-
gy. This advanced technology and these features are
designed to help enable the design of PC 99 and
PC 2001 compliant high-quality audio systems for desk-
top, portable, and entertainment PCs.
Coupling the CS4202 with a PCI audio accelerator or
core logic supporting the AC ’97 interface implements a
cost effective, superior quality audio solution. The
CS4202 surpasses PC 99, PC 2001, and AC ’97 2.2 au-
dio quality standards.
ORDERING INFO
CS4202-JQ 48-pin TQFP
9x9x1.4 mm
AC-LINK AND AC '97
REGISTERS
ANALOG INPUT MUX
AND OUTPUT MIXER
TEST
PWR
MGT
SRC
LINE
PCM_DATA
18 bit
ADC
INPUT
MUX
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
RESET#
ID0#
ID1#
AC-
LINK
CD
AUX
VIDEO
MIC1
MIC2
PHONE
PC_BEEP
INPUT
MIXER
GAIN / MUTE CONTROLS
MIXER / MUX SELECTS
AC '97
REGISTERS
Σ
OUTPUT
MIXER
EAPD
SPDIF_OUT
GPIO[4:0]
SDOUT,LRCLK,SCLK
GPIO, S/PDIF
SERIAL DATA PORT
SRC
LINE_OUT
HP_OUT
MONO_OUT
PCM_DATA
20 bit
DAC
Σ
Preliminary Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 2002
(All Rights Reserved)
MAY ’02
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©
CS4202
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 6
ANALOG CHARACTERISTICS ................................................................................................ 6
ABSOLUTE MAXIMUM RATINGS ........................................................................................... 7
RECOMMENDED OPERATING CONDITIONS ....................................................................... 7
AC ’97 SERIAL PORT TIMING................................................................................................. 9
2. GENERAL DESCRIPTION ..................................................................................................... 12
2.1 AC-Link ............................................................................................................................ 12
2.2 Control Registers ............................................................................................................. 13
2.3 Sample Rate Converters .................................................................................................. 13
2.4 Mixers .............................................................................................................................. 13
2.5 Input Mux ......................................................................................................................... 13
2.6 Volume Control ................................................................................................................ 13
3. AC-LINK FRAME DEFINITION .............................................................................................. 15
3.1 AC-Link Serial Data Output Frame .................................................................................. 16
3.1.1 Serial Data Output Slot Tags (Slot 0)............................................................................. 16
3.1.2 Command Address Port (Slot 1) .................................................................................... 16
3.1.3 Command Data Port (Slot 2).......................................................................................... 17
3.1.4 PCM Playback Data (Slots 3-4,6-11) ............................................................................. 17
3.1.5 GPIO Pin Control (Slot12).............................................................................................. 17
3.2 AC-Link Serial Data Input Frame ..................................................................................... 18
3.2.1 Serial Data Input Slot Tag Bits (Slot 0) ........................................................................ 18
3.2.2 Status Address Port (Slot 1) .......................................................................................... 18
3.2.3 Status Data Port (Slot 2) ................................................................................................ 19
3.2.4 PCM Capture Data (Slot 3-4,6-8,11).............................................................................. 19
3.2.5 GPIO Pin Status (Slot 12) ............................................................................................. 19
3.3 AC-Link Protocol Violation - Loss of SYNC ..................................................................... 20
4. REGISTER INTERFACE ..................................................................................................... 21
4.1 Reset Register (Index 00h) .............................................................................................. 22
4.2 Analog Mixer Output Volume Registers (Index 02h - 04h) .............................................. 22
4.3 Mono Volume Register (Index 06h) .................................................................................. 23
4.4 PC_BEEP Volume Register (Index 0Ah) .......................................................................... 23
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/sales.cfm
IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. "Advance" product infor-
mation describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the infor-
mation contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty
of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being
relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this
information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus
and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or
other intellectual property rights. Cirrus owns the copyrights of the information contained herein and gives consent for copies to be made of the information only
for use within your organization with respect to Cirrus integrated circuits or other parts of Cirrus. This consent does not extend to other copying such as copying
for general distribution, advertising or promotional purposes, or for creating any work for resale.
An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this ma-
terial and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export license and/or quota needs to be
obtained from the competent authorities of the Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign
Trade Law and is to be exported or taken out of the PRC.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE
PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANT-
ED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS
IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trade-
marks or service marks of their respective owners.
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CS4202
4.5 Phone Volume Register (Index 0Ch) ................................................................................ 23
4.6 Microphone Volume Register (Index 0Eh)........................................................................ 24
4.7 Analog Mixer Input Gain Registers (Index 10h - 18h) ...................................................... 25
4.8 Input Mux Select Register (Index 1Ah) ............................................................................. 26
4.9 Record Gain Register (Index 1Ch) ................................................................................... 27
4.10 General Purpose Register (Index 20h) ......................................................................... 28
4.11 Powerdown Control/Status Register (Index 26h) ........................................................... 29
4.12 Extended Audio ID Register (Index 28h) ........................................................................ 30
4.13 Extended Audio Status/Control Register (Index 2Ah) .................................................... 31
4.14 Audio Sample Rate Control Registers (Index 2Ch - 32h) ............................................... 32
4.15 S/PDIF Control Register (Index 3Ah) ............................................................................. 33
4.16 Extended Modem ID Register (Index 3Ch) .................................................................... 34
4.17 Extended Modem Status/Control Register (Index 3Eh) ................................................. 34
4.18 GPIO Pin Configuration Register (Index 4Ch) ................................................................ 34
4.19 GPIO Pin Polarity/Type Configuration Register (Index 4Eh) .......................................... 35
4.20 GPIO Pin Sticky Register (Index 50h) ............................................................................ 35
4.21 GPIO Pin Wakeup Mask Register (Index 52h) ............................................................... 36
4.22 GPIO Pin Status Register (Index 54h)............................................................................ 36
4.23 AC Mode Control Register (Index 5Eh) .......................................................................... 36
4.24 Misc. Crystal Control Register (Index 60h) ..................................................................... 38
4.25 Serial Port Control Register (Index 6Ah) ........................................................................ 39
4.26 BIOS-Driver Interface Control Registers (Index 70h - 72h) ............................................ 40
4.27 BIOS-Driver Interface Status Register (Index 7Ah) ........................................................ 40
4.28 Vendor ID1 Register (Index 7Ch) ................................................................................... 41
4.29 Vendor ID2 Register (Index 7Eh) ................................................................................... 41
5. SERIAL DATA PORTS ........................................................................................................... 42
5.1 Overview .......................................................................................................................... 42
5.2 Multi-Channel Expansion ................................................................................................. 42
5.3 Serial Data Formats ......................................................................................................... 43
6. SONY/PHILIPS DIGITAL INTERFACE (S/PDIF) ................................................................... 44
7. EXCLUSIVE FUNCTIONS ...................................................................................................... 44
8. POWER MANAGEMENT ....................................................................................................... 45
8.1 AC ’97 Reset Modes ........................................................................................................ 45
8.1.1 Cold Reset .......................................................................................................... 45
8.1.2 Warm Reset ........................................................................................................ 45
8.1.3 New Warm Reset ................................................................................................ 45
8.1.4 Register Reset .................................................................................................... 45
8.2 Powerdown Controls ....................................................................................................... 46
9. CLOCKING ............................................................................................................................. 48
9.1 PLL Operation (External Clock) ....................................................................................... 48
9.2 24.576 MHz Crystal Operation ........................................................................................ 48
9.3 Secondary Codec Operation ........................................................................................... 48
10. ANALOG HARDWARE DESCRIPTION ............................................................................... 50
10.1 Analog Inputs ................................................................................................................. 50
10.1.1 Line Inputs ........................................................................................................ 50
10.1.2 CD Input ............................................................................................................ 50
10.1.3 Microphone Inputs ............................................................................................ 50
10.1.4 PC Beep Input ................................................................................................... 51
10.1.5 Phone Input ....................................................................................................... 51
10.2 Analog Outputs .............................................................................................................. 51
10.2.1 Stereo Outputs .................................................................................................. 51
10.2.2 Mono Output ..................................................................................................... 52
10.3 Miscellaneous Analog Signals ....................................................................................... 52
10.4 Power Supplies .............................................................................................................. 52
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CS4202
10.5 Reference Design .......................................................................................................... 53
11. GROUNDING AND LAYOUT .............................................................................................. 54
12. PIN DESCRIPTIONS
14. REFERENCE DESIGN
........................................................................................................ 56
................................................................................................... 64
13. PARAMETER AND TERM DEFINITIONS ............................................................................ 62
15. REFERENCES ...................................................................................................................... 65
16. PACKAGE DIMENSIONS ..................................................................................................... 66
LIST OF FIGURES
Figure 1. Power Up Timing............................................................................................................ 10
Figure 2. Codec Ready from Start-up or Fault Condition .............................................................. 10
Figure 3. Clocks ............................................................................................................................ 10
Figure 4. Data Setup and Hold ...................................................................................................... 11
Figure 5. PR4 Powerdown and Warm Reset ................................................................................ 11
Figure 6. Test Mode ...................................................................................................................... 11
Figure 7. AC-link Connections....................................................................................................... 12
Figure 8. CS4202 Mixer Diagram.................................................................................................. 14
Figure 9. AC-link Input and Output Framing.................................................................................. 15
Figure 10. Serial Data Port: Six Channel Circuit ........................................................................... 42
Figure 11. Serial Data Format 0 (I2S) ........................................................................................... 43
Figure 12. Serial Data Format 1 (Left Justified) ............................................................................ 43
Figure 13. Serial Data Format 2 (Right Justified, 20-bit data) ....................................................... 43
Figure 14. Serial Data Format 3 (Right Justified, 16-bit data) ....................................................... 43
Figure 15. S/PDIF Output.............................................................................................................. 44
Figure 16. PLL External Loop Filter............................................................................................... 48
Figure 17. External Crystal............................................................................................................ 49
Figure 18. Line Input (Replicate for Video and AUX) .................................................................... 50
Figure 19. Differential 1 VRMS CD Input ...................................................................................... 50
Figure 20. Microphone Input ......................................................................................................... 51
Figure 21. PC_BEEP Input............................................................................................................ 51
Figure 22. Modem Connection ...................................................................................................... 51
Figure 23. Line Out and Headphone Out Setup ............................................................................ 52
Figure 24. Line Out/Headphone Out Setup ................................................................................... 52
Figure 25. +5V Analog Voltage Regulator..................................................................................... 53
Figure 26. Conceptual Layout for the CS4202 when in XTAL or OSC Clocking Modes ............... 55
Figure 27. Pin Locations for the CS4202 ...................................................................................... 56
Figure 28. CS4202 Reference Design .......................................................................................... 64
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LIST OF TABLES
Table 1. Register Overview for the CS4202 ..................................................................... 21
Table 2. Analog Mixer Output Attenuation........................................................................ 22
Table 3. Microphone Input Gain Values ........................................................................... 24
Table 4. Analog Mixer Input Gain Values ......................................................................... 25
Table 5. Analog Mixer Input Gain Register Index ............................................................. 25
Table 6. Input Mux Selection ............................................................................................ 26
Table 7. Record Gain Values ........................................................................................... 27
Table 8. Slot Mapping for the CS4202 ............................................................................. 30
Table 9. Slot Assignment Defaults ................................................................................... 30
Table 10. Directly Supported SRC Sample Rates for the CS4202................................... 32
Table 11. GPIO Input/Output Configurations.................................................................... 35
Table 12. Serial Data Format Selection............................................................................ 39
Table 13. Device ID with Corresponding Part Number..................................................... 41
Table 14. Serial Data Formats and Compatible DACs for the CS4202 ............................ 43
Table 15. Powerdown PR Bit Functions ........................................................................... 46
Table 16. Powerdown PR Function Matrix for the CS4202 .............................................. 47
Table 17. Power Consumption by Powerdown Mode for the CS4202 ............................. 47
Table 18. Clocking Configurations for the CS4202 .......................................................... 49
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