INTEGRATED CIRCUITS
74ALS240A/74ALS240A–1
Octal inverter buffer (3–State)
Product specification
IC05 Data Handbook
1991 Feb 08
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal inverter buffer (3-State)
74ALS240A/
74ALS240A-1
FEATURES
•
Octal bus interface
•
3-State buffer outputs sink 24mA and source 15mA
•
The -1 version sinks 48 mA
DESCRIPTION
The 74ALS240A is an octal buffer that is ideal for driving bus lines or
buffer memory address registers. The outputs are all capable of
sinking 24mA and sourcing up to 15mA, producing very good
capacitive drive characteristics. The device features two output
enables, OEa and OEb, each controlling four of the 3-State outputs.
The 74ALS240A-1 sinks 48 mA I
OL
if the V
CC
is limited to
5.0V
±0.25V.
TYPICAL
PROPAGATION
DELAY
4.5ns
4.5ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
15mA
15mA
PIN CONFIGURATION
OEa
Ia0
Yb0
Ia1
Yb1
Ia2
Yb2
Ia3
Yb3
1
2
3
4
5
6
7
8
9
20 V
CC
19 OEb
18 Ya0
17 Ib0
16 Ya1
15 Ib1
14 Ya2
13 Ib2
12 Ya3
11 Ib3
GND 10
SF00320
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
74ALS240AN,
74ALS240A-1N
74ALS240AD,
74ALS240A-1D
74ALS240ADB,
74ALS240A-1DB
DRAWING
NUMBER
TYPE
74ALS240A
74ALS240A-1
20-pin plastic DIP
20-pin plastic SOL
20-pin plastic SSOP
Type II
SOT146-1
SOT163-1
SOT339-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
Ian, Ibn
OEa, OEb
Yan, Ybn
Yan, Ybn
Data inputs
Output Enable inputs (active-Low)
Data outputs
Data outputs (-1 version)
DESCRIPTION
74ALS (U.L.)
HIGH/LOW
1.0/1.0
1.0/1.0
750/240
750/480
LOAD VALUE
HIGH/LOW
20µA/0.1mA
20µA/0.1mA
15mA/24mA
15mA/48mA
NOTE:
One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL
2
4
6
8
17
15
13
11
IEC/IEEE SYMBOL
1
19
Ia0
Ia1
Ia2
Ia3
Ib0
Ib1
Ib2 Ib3
EN1
EN2
18
16
14
12
2
3
5
7
9
2
4
6
2D
1
1
19
OEa
OEb
8
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
17
15
18
V
CC
= Pin 20
GND = Pin 10
16
14
12
3
5
7
9
13
11
SF00321
SF00322
1991 Feb 08
2
853–1244 01670
Philips Semiconductors
Product specification
Octal inverter buffer (3-State)
74ALS240A/
74ALS240A-1
LOGIC DIAGRAM
Ia0
2
18
Ya0
Ib0
17
3
Yb0
FUNCTION TABLE
INPUTS
OEa
L
L
Ia
L
H
X
OEb
L
L
H
Ib
L
H
X
OUTPUTS
Ya
H
L
Z
Yb
H
L
Z
Ia1
4
16
Ya1
Ib1
15
5
Yb1
Ia2
6
14
Ya2
Ib2
13
7
Yb2
H
H
L
X
Z
=
=
=
=
Ia3
8
12
Ya3
Ib3
11
9
Yb3
OEa
1
OEb
10
High voltage level
Low voltage level
Don’t care
High impedance “off” state
V
CC
= Pin 20
GND = Pin 10
SF00323
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
O
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
All versions
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
-1 version
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
48
96
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
O
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
All versions
Low-level
Low level output current
Operating free-air temperature range
-1 version
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–15
24
48
1
+70
LIMITS
NOM
5.0
MAX
5.5
UNIT
V
V
V
mA
mA
mA
mA
°C
NOTE:
1. The 48mA limit applies only under the condition of V
CC
= 5.0V
±5%.
1991 Feb 08
3
Philips Semiconductors
Product specification
Octal inverter buffer (3-State)
74ALS240A/
74ALS240A-1
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
V
CC
±10%,
V
IL
= MAX,
,
,
V
IH
= MIN
V
CC
= MIN, V
IL
= MAX,
V
IH
= MIN
All versions
V
OL
Low level output
Low-level out ut voltage
-1 version
V
IK
I
I
I
IH
I
IL
I
OZH
I
OZL
I
O
I
CC
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Off-state output current,
High-level voltage applied
Off-state output current,
Low-level voltage applied
Output current
3
I
CCH
Supply current (total)
I
CCL
I
CCZ
V
CC
= MAX
V
CC
= MIN, V
IL
= MAX,
,
,
V
IH
= MIN
V
CC
= 4.75V, V
IL
= MAX,
V
IH
= MIN
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.4V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.4V
V
CC
= MAX, V
O
= 2.25V
–30
2.5
19.5
23
I
OH
= –0.4mA
I
OH
= –3mA
I
OH
= –15mA
I
OL
= 12mA
I
OL
= 24mA
I
OL
= 48mA
LIMITS
MIN
V
CC
– 2
2.4
2.0
0.25
0.35
0.35
–0.73
0.40
0.50
0.50
–1.5
0.1
20
–0.1
20
–20
–112
11
23
30
V
V
V
V
mA
µA
mA
µA
µA
mA
mA
mA
3.2
TYP
2
MAX
UNIT
V
V
V
OH
High level output
High-level out ut voltage
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
OS
.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= 0°C to +70°C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500Ω
MIN
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
In to Yn
Output Enable time
to High or Low level
Output disable time
from High or Low level
Waveform 1
Waveform 2
Waveform 3
Waveform 2
Waveform 3
2.0
2.0
2.0
3.0
2.0
3.0
MAX
9.0
9.0
10.0
12.0
10.0
12.0
ns
ns
ns
UNIT
1991 Feb 08
4
Philips Semiconductors
Product specification
Octal inverter buffer (3-State)
74ALS240A/
74ALS240A-1
AC WAVEFORMS
For all waveforms, V
M
= 1.3V.
Ian, Ibn
V
M
t
PHL
V
M
t
PLH
Yn
V
M
V
M
SF00328
Waveform 1. Propagation Delay for Non-Inverting Output
OEn
V
M
t
PZH
V
M
t
PHZ
OEn
V
M
t
PZL
V
M
t
PLZ
3.5V
V
M
V
OL
+0.3V
V
OH
–0.3V
Yn
0V
Yn
V
M
SC00077
SC00078
Waveform 2. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
Waveform 3. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
V
CC
7.0V
NEGATIVE
PULSE
90%
V
M
10%
t
THL (
t
f
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0.3V
90%
AMP (V)
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
R
L
t
TLH (
t
r
)
90%
t
THL (
t
f
)
AMP (V)
90%
V
M
t
w
10%
0.3V
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST
SWITCH
closed
t
PLZ
, t
PZL
All other
open
POSITIVE
PULSE
10%
V
M
Input Pulse Definition
INPUT PULSE REQUIREMENTS
Family
Amplitude V
M
74ALS
3.5V
1.3V
Rep.Rate
1MHz
t
w
500ns
t
TLH
2.0ns
t
THL
2.0ns
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
SC00072
1991 Feb 08
5
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