EEWORLDEEWORLDEEWORLD

Part Number

Search

BUK109-50GL

Description
powermos transistor logic level topfet
CategoryDiscrete semiconductor    The transistor   
File Size109KB,11 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Download Datasheet Parametric View All

BUK109-50GL Overview

powermos transistor logic level topfet

BUK109-50GL Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerNXP
package instructionSMALL OUTLINE, R-PSSO-G2
Contacts3
Reach Compliance Codeunknow
ECCN codeEAR99
Other featuresLOGIC LEVEL COMPATIBLE, ESD PROTECTED
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage50 V
Maximum drain current (Abs) (ID)26 A
Maximum drain current (ID)26 A
Maximum drain-source on-resistance0.06 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PSSO-G2
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)75 W
Maximum pulsed drain current (IDM)100 A
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationSINGLE
transistor applicationsSWITCHING
Transistor component materialsSILICON
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
DESCRIPTION
Monolithic temperature and
overload protected logic level power
MOSFET in a 3 pin plastic surface
mount envelope, intended as a
general purpose switch for
automotive systems and other
applications.
BUK109-50GL
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
D
T
j
R
DS(ON)
PARAMETER
Continuous drain source voltage
Continuous drain current
Total power dissipation
Continuous junction temperature
Drain-source on-state resistance
V
IS
= 5 V
MAX.
50
26
75
150
60
UNIT
V
A
W
˚C
mΩ
APPLICATIONS
General controller for driving
lamps
motors
solenoids
heaters
FEATURES
Vertical power DMOS output
stage
Low on-state resistance
Overload protection against
over temperature
Overload protection against
short circuit load
Latched overload protection
reset by input
5 V logic compatible input level
Control of power MOSFET
and supply of overload
protection circuits
derived from input
Low operating input current
ESD protection on input pin
Overvoltage clamping for turn
off of inductive loads
FUNCTIONAL BLOCK DIAGRAM
DRAIN
O/V
CLAMP
INPUT
RIG
POWER
MOSFET
LOGIC AND
PROTECTION
SOURCE
Fig.1. Elements of the TOPFET.
PINNING - SOT404
PIN
1
2
3
mb
input
drain
source
drain
DESCRIPTION
PIN CONFIGURATION
mb
SYMBOL
D
TOPFET
I
P
2
1
3
S
June 1996
1
Rev 1.000

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2426  909  1982  143  503  49  19  40  3  11 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号