PSoC CY8CTMG20x, CY8CTMG20xA, CY8CTST200,
CY8CTST200A TRM
PSoC
®
CY8CTMG20x, CY8CTMG20xA,
CY8CTST200, CY8CTST200A
Technical Reference Manual (TRM)
Document No. 001-53603 Rev. *C
December 11, 2009
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone (USA): 800.858.1810
Phone (Intnl.): 408.943.2600
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Copyrights
Copyrights
© Cypress Semiconductor Corporation, 2009. The information contained herein is subject to change without notice. Cypress
Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress
product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor
intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express
written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-
support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The
inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use
and in doing so indemnifies Cypress against all charges.
PSoC® is a registered trademark and PSoC Designer™, TrueTouch™, and PSoC Express™ are trademarks of Cypress
Semiconductor Corporation (Cypress), along with Cypress® and Cypress Semiconductor™. All other trademarks or regis-
tered trademarks referenced herein are the property of their respective owners.
Purchase of I
2
C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Phil-
ips I
2
C Patent Rights to use these components in an I
2
C system, provided that the system conforms to the I
2
C Standard
Specification as defined by Philips.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by
and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty
provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create
derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom soft-
ware and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as speci-
fied in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source
Code except as specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATE-
RIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described
herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein.
Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure
may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support sys-
tems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all
charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Flash Code Protection
Note the following details of the Flash code protection features on Cypress devices.
Cypress products meet the specifications contained in their particular Cypress Data Sheets. Cypress believes that its family of
products is one of the most secure families of its kind on the market today, regardless of how they are used. There may be
methods that can breach the code protection features. Any of these methods, to our knowledge, would be dishonest and pos-
sibly illegal. Neither Cypress nor any other semiconductor manufacturer can guarantee the security of their code. Code pro-
tection does not mean that we are guaranteeing the product as "unbreakable."
Cypress is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly
evolving. We at Cypress are committed to continuously improving the code protection features of our products.
2
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
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Contents Overview
Section A: Overview
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
13
23
Pin Information .......................................................................................................................... 19
CPU Core (M8C) ........................................................................................................................ 27
Supervisory ROM (SROM) ......................................................................................................... 33
RAM Paging ............................................................................................................................... 39
Interrupt Controller ..................................................................................................................... 45
General Purpose I/O (GPIO) ...................................................................................................... 55
Internal Main Oscillator (IMO) ..................................................................................................... 63
Internal Low Speed Oscillator (ILO) ............................................................................................ 67
External Crystal Oscillator (ECO) ............................................................................................... 69
Sleep and Watchdog .................................................................................................................. 73
Section B: PSoC Core
Section C: TrueTouch System
83
11. TrueTouch Module ..................................................................................................................... 85
12. I/O Analog Multiplexer ................................................................................................................ 99
13. Comparators ............................................................................................................................ 101
Section D: System Resources
14.
15.
16.
17.
18.
19.
20.
105
Digital Clocks ........................................................................................................................... 109
I2C Slave ................................................................................................................................. 117
System Resets ......................................................................................................................... 135
POR and LVD .......................................................................................................................... 143
SPI ......................................................................................................................................... 145
Programmable Timer ................................................................................................................ 161
Full-Speed USB ....................................................................................................................... 165
Section E: Registers
Section F: Glossary
Section F: Index
183
287
303
21. Register Reference .................................................................................................................. 187
3
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Contents Overview
4
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Contents
Section A: Overview
1. Pin Information
1.1
13
19
Pinouts....................................................................................................................................19
1.1.1 CY8CTMG200-16LGXI, CY8CTMG200A-16LGXI, CY8CTST200-16LGXI,
CY8CTST200A-16LGXI PSoC 16-Pin Part Pinout 19
1.1.2 CY8CTMG200-24LQXI, CY8CTMG200A-24LQXI, CY8CTST200-24LQXI,
CY8CTST200A-24LQXI PSoC 24-Pin Part Pinout 20
1.1.3 CY8CTMG200-32LQXI, CY8CTMG200A-32LQXI, CY8CTST200-32LQXI,
CY8CTST200A-32LQXI, CY8CTMG201-32LQXI, CY8CTMG201A-32LQXI PSoC 32-
Pin Part Pinout21
1.1.4 CY8CTMG200-48LTXI, CY8CTMG200A-48LTXI, CY8CTST200-48LTXI,
CY8CTST200A-48LTXI, CY8CTMG201-48LTXI, CY8CTMG201A-48LTXI PSoC
48-Pin Part Pinout22
Section B: PSoC Core
2. CPU Core (M8C)
2.1
2.2
2.3
2.4
2.5
23
27
2.6
Overview.................................................................................................................................27
Internal Registers....................................................................................................................27
Address Spaces......................................................................................................................27
Instruction Set Summary ........................................................................................................28
Instruction Formats .................................................................................................................30
2.5.1 One-Byte Instructions ................................................................................................30
2.5.2 Two-Byte Instructions ................................................................................................30
2.5.3 Three-Byte Instructions..............................................................................................31
Register Definitions.................................................................................................................32
2.6.1 CPU_F Register ........................................................................................................32
2.6.2 Related Registers ......................................................................................................32
3.
Supervisory ROM (SROM)
3.1
33
Architectural Description.........................................................................................................33
3.1.1 Additional SROM Feature ..........................................................................................34
3.1.2 SROM Function Descriptions ....................................................................................34
3.1.2.1 SWBootReset Function ...............................................................................34
3.1.2.2 ReadBlock Function ....................................................................................35
3.1.2.3 WriteBlock Function.....................................................................................35
3.1.2.4 EraseBlock Function....................................................................................36
3.1.2.5 ProtectBlock Function..................................................................................36
3.1.2.6 TableRead Function ....................................................................................36
3.1.2.7 EraseAll Function ........................................................................................36
3.1.2.8 Checksum Function.....................................................................................37
3.1.2.9 Calibrate0 Function .....................................................................................37
3.1.2.10 Calibrate1 Function .....................................................................................37
5
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