W91350N SERIES
13-MEMORY TONE/PULSE DIALER WITH
HANDFREE AND HOLD FUNCTIONS
GENERAL DESCRIPTION
The W91350N series are tone/pluse switchable telephone dialers with thirteen memories, hold
function, and a handfree dialing control circuit. Fabricated using CMOS technology, the W91350N series
offer good performance in low-voltage and low-power applications.
FEATURES
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DTMF/pulse switchable dialer
Two by 32-digit redial memory and save memory
Three by 16-digit one-touch direct repertory memory
Ten by 16-digit two-touch direct repertory memory
Cascaded dialing allowed, with unlimited dialing length
Pulse-to-tone (*/T) keypad for long distance call operation
Uses 5
×
5 keyboard
Easy operation with redial, flash, pause, and */T keypads
Pause, P→T (pulse-to-tone) can be stored as a digit in memory
Dialing rate (10 ppS or 20 ppS) is selectable by bonding option
On-hook debounce time: 150 msec.
Minimum tone output duration: 93 msec. (W91354AN: 87 mS)
Minimum intertone pause: 93 msec. (W91354AN: 87 mS)
Flash break time (73, 100, 300, 600 msec) selectable by keypad; pause time is 1.0 sec.
Make/break ratio (40:60 or 33.3:66.7) selectable by MODE pin
On-chip power-on reset
Uses 3.579545 MHz crystal or ceramic resonator
Packaged in 18 or 20-pin plastic DIP
The different dialers in the W91350N series are shown in the following table:
TYPE NO.
W91350N
W91352N
W91350AN
W91352AN
W91354AN
REPLACEMENT
TYPE NO.
W91350
W91351
W91352
W91350A
W91351A
W91352A
New type
20
10
600/300/73/100
600/300/73/100
Pin
Pin
Yes
Yes
20
20
20
10
600/300/73/100
600/300/73/100
Pin
Pin
-
Yes
18
20
PULSE
(ppS)
10
FLASH
(mS)
600/300/73/100
M/B
Pin
HANDFREE
DIALING
-
PACKAGE
(PINS)
18
Note: The W91354AN is for use in France only. The pause time is not added in pulse-to-tone function mode.
-1-
Publication Release Date: May 1997
Revision A2
W91350N SERIES
PIN CONFIGURATIONS
C1
C1
C2
C3
C4
H/P MUTE
V
SS
XT
XT
T/P MUTE
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
R4
R3
R2
R1
V
DD
MODE
DTMF
DP/C5
HKS
C2
C3
C4
H/P MUTE
V
SS
XT
XT
T/P MUTE
HFI
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
R4
R3
R2
R1
V
DD
MODE
DTMF
DP/C5
HKS
HFO
W91350N/352N
W91350AN/352AN/354AN
PIN DESCRIPTION
SYMBOL
Column-
Row Inputs
18-PIN
1−4
&
15−18
20-PIN
1−4
&
17−20
I/O
I
FUNCTION
The keyboard inputs may be used with either a standard
5
×
5 keyboard or an inexpensive single contact (Form A)
keyboard. Electronic input from a
µC
can also be used.
A valid key in is defined as a single row being connected to
a single column.
A built-in inverter provides oscillation with an inexpensive
3.579545 MHz crystal or ceramic resonator.
The T/P MUTE is a conventional CMOS N-channel open
drain output.
The output transistor is switched on during dialing sequence
and flash break time. Otherwise, it is switched off.
Pulling mode pin to V
SS
places the dialer in tone mode.
Pulling mode pin to V
DD
places the dialer in pulse mode
with M/B ratio of 40:60 (10 ppS, except for
W91352N/352AN = 20 ppS).
Floating mode pin places the dialer in pulse mode with M/B
ratio of 33.3:66.7 (10 ppS, except for W91352N/352AN =
20 ppS).
HKS
XT, XT
T/P
MUTE
7, 8
9
7, 8
9
I, O
O
MODE
13
15
I
10
12
I
Hook switch input.
HKS = V
DD
: On-hook state. Chip in sleeping mode, no
operation.
HKS = V
SS
: Off-hook state. Chip is enabled for normal
operation.
HKS pin is pulled to V
DD
by an internal resistor.
-2-
W91350N SERIES
Pin Description, continued
SYMBOL
DP
/
C5
18-PIN
11
20-PIN
13
I/O
O
FUNCTION
N-channel open drain dialing pulse output.
Flash key will cause
DP
/
C5
to be active in either tone
mode or pulse mode.
The timing diagram for pulse mode is shown in Figure 1(a, b, c).
Power input pins.
In pulse mode, this pin remains in low state at all times.
In tone mode, it will output a dual or single tone. Detailed
timing diagram for tone mode is shown in Figure 2(a, b, c).
Output Frequency
Specified
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
Actual
699
766
848
948
1216
1332
1472
Error %
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
V
DD
, V
SS
DTMF
14, 6
12
16, 6
14
I
O
HFI, HFO
-
10, 11
I, O
Handfree control pins. The handfree control state is toggled
on by a low pulse on the HFI input pin. The status of the
handfree control state is described in the following table:
CURRENT STATE
Hook SW.
HFO
Low
On Hook
Off Hook
On Hook
Off Hook
Off Hook
Low
High
High
High
NEXT STATE
Input
HFI
HFI
HFI
Off Hook
On Hook
On Hook
HFO
High
Low
Low
Low
Low
High
Dialing
Yes
No
Yes
Yes
No
Yes
HFI pin is pulled to V
DD
by an internal resistor.
Detailed timing diagram is shown in Figure 3.
H/P MUTE
5
5
O
The H/P MUTE is a conventional inverter output. During
pulse dialing, flash break or hold period, this output is active
high; otherwise, it remains in low state.
-3-
Publication Release Date: May 1997
Revision A2
W91350N SERIES
BLOCK DIAGRAM
XT
XT
SYSTEM CLOCK
GENERATOR
HKS
HFI
ROW
(R1 to R4, Vx)
KEYBOARD
INTERFACE
COLUMN
(C1 to C4)
LOCATION
LATCH
READ / WRITE
COUNTER
CONTROL
LOGIC
MODE
H/P MUTE
RAM
PULSE
CONTROL
LOGIC
T/P MUTE
DP/C5
HFO
ROW & COLUMN
PROGRAMMABLE
COUNTER
DTMF
D/A
CONVERTER
DATA LATCH
& DECODER
FUNCTIONAL DESCRIPTION
Keyboard Operation
C1
1
4
7
∗/T
F1
•
•
•
•
•
•
•
•
C2
2
5
8
0
F2
C3
3
6
9
#
F3
DP
/
C5
S
M1
F4
M2
A
M3
R/P SAVE
C4
R1
R2
R3
R4
V
X
H
S: Store function key
H: Hold function key
A: Indirect repertory memory dialing function key
R/P: Redial and pause function key
SAVE: Save function key
∗/T: ∗
in tone mode and P→T in pulse mode
M1, ..., M3: One-touch memory
F1, ..., F4: Flash keys, F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS
Notes:
D1, ..., Dn, D1', ..., Dn': 0, ..., 9, */T, #
Mn: M1 , ..., M3 ; Ln: 0, ..., 9; Fn: F1, ..., F4
-4-
W91350N SERIES
Normal Dialing
OFF HOOK
, (or
ON HOOK
&
HFI
¡õ
),
D1
,
D2
,
...,
Dn
1. D1, D2, ..., Dn will be dialed out.
2. Dialing length is unlimited, but redial is inhibited if length exceeds 32 digits in normal dialing.
Redialing
OFF HOOK
ON HOOK
,
, (or
ON HOOK
&
HFI
¡õ
ON HOOK
),
&
D1
,
D2
),
, ...,
R/P
Dn
Busy, Come
OFF HOOK
, (or
HFI
¡õ
1. The redial memory content will be dialed out.
2. The
R/P
key can execute the redial function only as the first key-in after off-hook; otherwise, it
executes pause function.
3. If redialing length exceeds 32 digits, the redialing function will be inhibited.
Number Store
OFF HOOK
, (or
ON HOOK
&
HFI
¡õ
),
D1
,
D2
,
...,
Dn
,
S
,
S
,
Mn
( or
Ln
)
S
will be ignored.
1. If the sequence of the dialed digits D1, D2, ..., Dn has not
finished,
2. D1, D2, ..., Dn will be dialed out and stored in memory location.
OFF HOOK
Mn
( or
Ln
, (or
)
ON HOOK
&
HFI
¡õ
),
S
,
D1
,
D2
, ...,
Dn
,
S
,
3. D1, D2, ..., Dn will be stored in memory location but will not be dialed out.
4.
R/P
and
*/T
keys can be stored as a digit in memory.
is the pause function key.
In store mode,
R/P
5. The store mode is released after the store function is executed or when the state of the hook
switch changes.
Repertory Dialing
OFF HOOK , (or
OFF HOOK , (or
ON HOOK
ON HOOK
&
&
HFI
¡õ
HFI
¡õ
),
),
Mn
A
,
Ln
Access Pause
Publication Release Date: May 1997
Revision A2
-5-
ARM Technology
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