1
R103
1
2
3
U1
HD64F2166
144
143
12
135
141
8
11
10
9
14
112
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
121
122
123
124
125
126
127
128
129
130
131
132
138
2
3
4
16
15
133
134
136
137
5
6
78
79
80
81
82
83
84
85
68
69
70
71
72
73
74
75
94
93
EXTAL
XTAL
STBYn
FWE
PFSEL
RESn
NMI
MD0
MD1
MD2n
P10
P11
P12
P13
P14
P15
P16
P17
P20
P21
P22
P23
P24
P25
P26
P27
P30
P31
P32
P33
P34
P35
P36
P37
P40
P41
P42
P43
P44
P45
P46
P47
P50
P51
P52
P53
P54
P55
P56
P57
P60
P61
P62
P63
P64
P65
P66
P67
P70
P71
P72
P73
P74
P75
P76
P77
PF0
PF1
VCL
RESOn
ETRSTn
ETMS
ETCK
ETDI
ETDO
AVREF
AVCC
AVSS
P80
P81
P82
P83
P84
P85
P86
P87
P90
P91
P92
P93
P94
P95
P96
P97
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
13
142
91
87
90
89
88
77
76
67
50
49
48
47
46
45
44
43
24
23
22
21
20
19
18
17
41
40
39
38
37
35
34
33
120
119
118
117
116
115
114
113
32
31
30
29
28
27
26
25
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
4
5
REV
2
1
6
REF
Release
DATE
24-Aug-2004
DRAWN BY
DPR
3A1,4C3
4C2
CON_EXTAL
CON_XTAL
DNF_0603
2
DNF_0603
2
1
R104
1
DNF_0603
2
R132
200R
Board_VCC
X2
1
(DNF)
0R
R127
R128
2A6,3A6,4C3
RESn
RESOn
ETRSTn
ETMS
ETCK
ETDI
ETDO
A
33MHz
2
4C3
3C5,4A3
3C5,4A4
3C5,4B4
3C5,4A4
3C5,4B4
C43
470nF
2
1
C44
100nF
2
AVREF AVCC
GROUND
R107
1
1
1
3
IN OUT
VCC=Board_VCC
DNF_0603
2
DNF_0603
2
CON_AVREF
CON_AVCC
X1
8.25MHz
3
1
1
3B1,4A4
3A1,4A4
A
2
R108
1
1
Board_VCC
C34
22pF
2
2
C33
22pF
DNF_0603
1
100K
100K
100K
R113
R116
R106
R114
GROUND
4B3
4B3,5A5
4B2,5A5
4A3,5A5
4A3,5B5
4A3,5B5
4A3,5B5
4B3,5B5
4A3,5B5
4B3,5B5
4A3,5B5
4B3,5B5
4A3,5B5
4B3,5B5
4A3,5B5
4B3,5B5
4B2,5C5
4B3,5C5
4B2,5C5
4B3,5C5
4B2,5C5
4B3,5C5
4B2,5C5
4B3,5C5
1B6,4B2
4B3
3A3,4B2
3A3,4B3
1B6,4C3
1B6,4C3
4D3
4C3
3C1,4C3
3C1,4D3
3A5,4C2
3A5,4C3
4C3
4C2
3A3,4D3
3A3,4C3
4B4,5C5
4A4,5C5
4B4,5C5
4A4,5C5
4B4,5C5
4A4,5C5
4B4,5C5
4A4,5C5
1C1,3B1,4B4
3B1,4B5
3B1,4B4
3B1,4B5
4B4
4A4
3B1,4A4
3B1,4A4
4B3
4A3
P10
P11
P12
P13
P14
P15
P16
P17
P20
P21
P22
P23
P24
P25
P26
P27
P30
P31
P32
P33
P34
P35
P36
P37
IRQ0n
P41
IOPORT_T1
IOPORT_T2
IRQ4n
IRQ5n
P46
P47
TXD0
RXD0
PTXD
PRXD
P54
P55
IOPORT_T3
IOPORT_T4
P60
P61
P62
P63
P64
P65
P66
P67
AN0
AN1
AN2
AN3
P74
P75
DA0
DA1
PF0
PF1
SCL0
SDA0
ExIRQ10n
P83
P84
PSCK
P86
P87
P90
P91
P92
P93
P94
P95
P96
P97
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
IOPORT_0
IOPORT_1
IOPORT_2
IOPORT_3
IOPORT_4
IOPORT_5
IOPORT_6
IOPORT_7
3B1,4B4
3B1,4B5
1B6,4C4
1B6,4C5
4C4
3A5,4C5
4C4
4C5
4C4,5C3
4D4
4C4
4D4,5C3
4C4,5C3
4D4
4C3
4D3
4C5,5B5
4C4,5B5
4C5,5B5
4C4,5B3
4C5,5B3
4D4,5B3
4C4,5B3
4D4,5B3
4B3
4B2
4B3
4B2
4B3
4B2
4B3
4B2
4C4
4D4
4C4
4D4
4C4
3A5,4D4
4C4
4D4
4B4
4B5
4B4
4B5
4B4
4B5
4B4
4B5
3A4,4B4
3A4,4B5
3A4,4B4
3A4,4B5
3B3,4B4
3B3,4B5
3B3,4B4
3B3,4B5
1
DNF_0603
2
CON_AVSS
3A1,4B5
R109
AVSS
Configuration links
Board_VCC
R10
1
2
AVCC
2B2
SW1
1
R122
0R
2
2
2
2
IRQ0n
1C3,4B2
1
1
2
1
4C3
1C6,3A5,4C2
4C2
4D3
STBYn
FWE
PFSEL
NMIn
2
0R
2B2
AVCC
R126
1
SW2
1
R123
0R
2
IRQ4n
1C3,4C3
AVREF
2A2
2
SW3
1
R124
0R
2
IRQ5n
1C3,4C3
0R
B
J16
M20-9990206
100K
1
2
1
R115
2
J17
M20-9990206
Board_VCC
R120
1
3B3
2
IOPORT_INT
1
R125
ExIRQ10n
0R
2
1A4,4C4
B
Fit to disable
Flash Writing
1
2
2
Fit to enable
User Boot mode
R112
GROUND
0R
GROUND
AVSS
3C1
RS-232_SHDNn
1
R105
DNF_0603
2
P83
1A4,4C5
100K
100K
1
R111
1
Default:
Mode 2
4C3
1C6,3A5,4D3
1C6,3A5,4C3
MD0
MD1
MD2n
2
Boot mode drivers
Board_VCC
100K
R110
2A4
1
BOOTn
1
R117
2K2
2
1
2
3
TR4
BC858CLT1
R100
1
GROUND
AVREF
100R
FWE
2
1B1,3A5,4C2
A/D Input
R121
1
R101
1
100R
MD1
2
1B2,3A5,4D3
C
10K
0R
AN0
2
1D3,3B1,4B4
2B4
BOOT
1
R119
2K2
2
3
1
2
C
TR3
BC848C
3
R129
1
2
AVSS
GROUND
R102
1
100R
MD2n
2
1B2,3A5,4C3
2B4
BOOT
1
R118
2K2
2
3
1
2
TR2
BC848C
MCU decoupling
UVCC
AVCC
AVREF
GROUND
SIZE A4
RENESAS TECHNOLOGY EUROPE LTD
Dukes Meadow, Bourne End, Buckinghamshire
UNITED KINGDOM
SCHEMATIC TITLE
D
2
2
2
2
2
2
2
2
D
C35
10uF
1
1
C38
100nF
1
C41
100nF
1
C42
100nF
1
C37
10uF
1
C40
10nF
1
C36
10uF
1
C39
10nF
3DK2166
SHEET TITLE
Microcontroller
POWER: 1, 36, 86
DRAWN BY
DPR
GROUND: 7,42, 95, 111, 139
5
DATE
24-Aug-2004
GROUND
AVSS
AVSS
PF2
92
PF2
4B3
REV DRAWING NUMBER PAGE
2
D005392_04
1
5
VCC=UVCC
1
2
3
4
6
1
2
3
4
5
6
Board_VCC
Board_VCC
R1
100K
100K
100K
100K
A
RES
1,2
3,4
Board_VCC
R9
4
2
3
1
10
12
11
13
GROUND
2
Boot latch
U2
SN74HC74D
1S
1D
C1
1R
2S
2D
C2
2R
5
1
DNF_0603
1
2
R2
R5
R7
TR1
BC848C
R4
2K2
2
U3
BD5231G
5
1
R3
100K
2
2
D3
1N4148W
(DNF)
2
1
2
2
1
1
A
1A3,3A6,4C3
1
2
1
1
3
1
2
CT
RESET
1
1
RESn
C1
DNF
2
Board_VCC
R6
6
9
8
NC
C26
10nF
2
VCC=Board_VCC
SW3
1,2
3,4
2
SW3
100K
1
1B5
C2
100nF
BOOTn
BOOT
1
GROUND
1C5
1
GROUND
1C5
GROUND
SW2
3,4
1,2
1B5
GROUND
2
1K1
SW2
VCC=Board_VCC
R8
GREEN
BOOT
SW1/BOOT
1,2
3,4
SW1
1B5
Decoupling
Board_VCC
GROUND
B
GROUND
B
1
SWITCHES
C3
100nF
2
GROUND
PSU
Fit to allow a +5V
PSU to be used
J18
2
1
1
R133
DNF_0603
2
M20-9990206
(DNF)
1
0R
R131
D2
1
(DNF)
2
C
J9
KLD-SMT2-0202A
SKT
1N4148W
Supply
Board_VCC
UVCC
C
2
NC
4
NC
PWR 1,2
D1
2
1
U4
LM317LM
1
1
1
VIN
VOUT
ADJ
4
2,3,6,7
2
1
R11
0R
1
3
240R
GND
1N4148W
J11
C8
100nF
(DNF)
1 2
M20-9990206
C4
1uF
2
2
C5
100nF
C7
1uF
2
2
R12
2
1
1
GROUND
1
1
GROUND
T1
T2
T3
390R
C6
10uF
2
1206 0R link may be replaced
with a low value resistor for
current measurement or
bypassed using J11
R13
GROUND
1 2
GROUND
Ground test points
for probe connection
2
R14
Current
Measurement
SIZE A4
0R
RENESAS TECHNOLOGY EUROPE LTD
Dukes Meadow, Bourne End, Buckinghamshire
UNITED KINGDOM
SCHEMATIC TITLE
D
GROUND
(DNF)
GROUND
D
3DK2166
SHEET TITLE
Switches and PSU
DRAWN BY
DPR
DATE
24-Aug-2004
REV DRAWING NUMBER PAGE
2
D005392_04
2
5
1
2
3
4
5
6
1
2
3
4
5
6
GENERIC HEADERS
Board_VCC
Supply
Board_VCC
LEDs
R15
1
Debug & Flash (FoUSB)
1D4,3B3,4B4
Board_VCC
The switch allows the fitted device to be held in reset
so that another device connected to the programming
header may be programmed using this board.
1C4,4D4
1C3,3C1,4C3
1B2,3C4,4C3
1C3,3C1,4C2
1
LED1
RED
LED2
1K1
IOPORT_0
2
1
2
1
1
2
3
4
5
6
7
8
9
1A1,4C3
3
4
5
6
IOPORT_T1
IOPORT_T2
IOPORT_T3
IOPORT_T4
NC
NC
NC
IOPORT_U
IOPORT_V
IOPORT_W
LED3
R17
1
2
CON_EXTAL
2
IOPORT_TXD
IOPORT_RXD
RED
Board_VCC
1
2
4
100K
A
R16
1K1
IOPORT_1
1D4,3B3,4B5
R130
A
1A5,4A4
1A5,4B5
1A5,4A4
1C1,4B4
1D3,4B5
1D3,4B4
1D3,4B5
1D3,4A4
1D3,4A4
1A4,4B4
1A4,4B5
CON_AVCC
CON_AVSS
CON_AVREF
AN0
AN1
AN2
AN3
DA0
DA1
SCL0
SDA0
NC
NC
GROUND
7
8
9
10
11
12
13
14
15
16
17
18
19
M20-9991906
(Supplied loose)
1C3,4B2
1C3,4B3
1C3,4D3
1C3,4C3
1K1
IOPORT_2
2
RED
LED4
1
1D4,3B3,4B4
1B4,4C5
1B2,4D3
1D4,3B3,4B5
1B1,4C2
PSCK
MD1
FWE
3
5
7
9
R18
1K1
2
IOPORT_3
J12
6
8
10
PC5
PRXD
MD2n
RESn_EXT
MCU_SEL
1
3
2
RED
LED5
1
PTXD
RESn
1A3,2A6,3B3,4C3
R19
1K1
2
M20-9480506
IOPORT_4
J5
J6
10
11
12
13
14
15
16
17
18
19
20
IOPORT_0
IOPORT_1
IOPORT_2
IOPORT_3
IOPORT_4
IOPORT_5
IOPORT_6
IOPORT_7
RESn
IOPORT_INT
1D4,3A4,4B4
1D4,3A4,4B5
1D4,3A4,4B4
1D4,3A4,4B5
1D4,3B4,4B4
1D4,3B4,4B5
1D4,3B4,4B4
1D4,3B4,4B5
1A3,2A6,3A6,4C3
1B5
RED
LED6
1
1D4,3B3,4B4
GROUND
GROUND
R20
1K1
2
IOPORT_5
RED
LED7
1
1D4,3B3,4B5
R21
1K1
2
IOPORT_6
RED
LED8
1
1D4,3B3,4B4
R22
1K1
2
IOPORT_7
RED
1D4,3B3,4B5
B
B
GROUND
M20-9992006
(Supplied loose)
Board_VCC
1B2,3A5,4C3
C45
100nF
2
Fit to enable E10A
(move from J10)
MD2n
J15
2
1
M20-9990206
Debug (E10A)
Board_VCC
Board_VCC
SERIAL PORT
C10
100nF
1
2
1
GROUND
DNF_0603
1
DNF_0603
1
DNF_0603
1
DNF_0603
1
R23
R24
R25
C
1
1
2
4
5
6
1
20
13
12
1
2
C1+
C1-
C2+
C2-
ENn
SHDNn
T1IN
T2IN
R1OUT
R2OUT
V+
V-
100K
100K
100K
1
2
R77
R76
4K7
3
7
DNF_0603
1
2
2
2
1
U5
MAX3222CUP
1
100nF
C9
Board_VCC
GROUND
Board_VCC
R73
1
3
5
7
R134
R75
R74
2
2
C11
2
2
2
2
1
2
100nF
1
C13
100nF
C12
100nF
1B5
1C3,3A5,4C2
1C3,4C3
1C3,3A5,4C3
1C3,4D3
RS-232_SHDNn
PTXD
TXD0
1
GROUND
GROUND
T1OUT
T2OUT
R1IN
R2IN
17
8
16
9
IOPORT_TXD
1A3,2A6,3A6,4C3
RESn
U9
SN74LVC1G07DCKR
4
1
2
1A4,4B4
1A4,4A3
1A4,4B4
ETCK
ETRSTn
ETDO
ETMS
ETDI
RESn
2
J13
M20-9480706
TCK
TRSTn
TDO
ASEBRKn
TMS
TDI
RESETn
GND
GND
GND
VCC
GND
GND
GND
2
4
6
8
10
12
14
C
VCC=Board_VCC
0R
2
1A4,4A4
1A4,4A4
1A3,2A6,3A6,4C3
9
11
13
R59
PRXD
RXD0
1
2
1
J10
2
0R
15
10
IOPORT_RXD
R60
M20-9990206
2
GROUND
J8
NC LDE9S1ASNT
1
SKT
2
3
6
7
8
9
100K
R26
VCC=Board_VCC
NC
GROUND
4
5
NC
NC
NC
NC
1
SIZE A4
SHIELD=SHIELD
RENESAS TECHNOLOGY EUROPE LTD
Dukes Meadow, Bourne End, Buckinghamshire
UNITED KINGDOM
SCHEMATIC TITLE
D
1
R78
DNF_0603
2
GROUND
D
3DK2166
SHIELD
GROUND
SHEET TITLE
Generic & FLASH connector, LEDs & Serial Port
DRAWN BY
DPR
DATE
24-Aug-2004
REV DRAWING NUMBER PAGE
2
D005392_04
3
5
1
2
3
4
5
6
1
2
3
4
5
6
1A4,3C5
1D3
1B3,5B5
1B3,5B5
1B3,5B5
1B3,5B5
1B3,5B5
1A3,5B5
ETRSTn
PF1
P26
P24
P22
P20
P16
P14
9
7
35
33
31
29
27
25
23
21
19
17
15
13
11
5
GROUND
A
ETDI
ETMS
P67
P65
P63
P61
CON_AVREF
DA1
P75
3
1
1A4,3C5
1A4,3C5
1D3,5C5
1D3,5C5
1D3,5C5
1C3,5C5
1A5,3B1
1D3,3B1
1D3
A
M20-9981806
(Supplied loose)
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
J3
1A3,5A5
1B3,5B5
1B3,5B5
1B3,5B5
1B3,5B5
1B3,5B5
1B3,5B5
1D3
1D4
P13
P15
P17
P21
P23
P25
P27
PF0
PF2
DA0
CON_AVCC
P60
P62
P64
P66
ETDO
ETCK
1D3,3B1
1A5,3A1
1C3,5C5
1D3,5C5
1D3,5C5
1D3,5C5
1A4,3C5
1A4,3C5
Board_VCC
J2
1A3,5A5
1A3
1C4
1C4
1C4
1C4
1B3,5C5
1B3,5C5
1B3,5C5
1B3,5C5
1C3
1C3,3A3
1C3,3A5
1C3
1B6
1A4
1A1,3A1
1D3
1D3,3B1
1C1,3B1
1C4
1D4
1D4
1D4
1D4,3A4
1D4,3A4
1D4,3B3
1D4,3B3
1A4,3B1
1A4
1A4
1B4
1B4,5B5
1B4,5B3
1A3,5A5
P12
PB7
PB5
PB3
PB1
P30
P32
P34
P36
IRQ0n
IOPORT_T1
PTXD
FWE
P55
PFSEL
CON_XTAL
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
B
GROUND
1C4
1C4
1C4
1C4
1B3,5C5
1B3,5C5
1B3,5C5
1B3,5C5
1B6
1C3,3A3
1C3,3A5
1B1,3A5
1C3
1B1
1A1
P11
P10
PB6
PB4
PB2
PB0
P31
P33
P35
P37
P41
IOPORT_T2
PRXD
P54
IRQ4n
NC
P74
AN2
AN0
PD0
PD2
PD4
PD6
IOPORT_0
IOPORT_2
IOPORT_4
IOPORT_6
SCL0
ExIRQ10n
P84
P86
PA1
PA3
M20-9981806
(Supplied loose)
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
RESOn
CON_EXTAL
AN3
AN1
CON_AVSS
PD1
PD3
PD5
PD7
IOPORT_1
IOPORT_3
IOPORT_5
IOPORT_7
SDA0
P83
PSCK
P87
PA0
PA2
PA4
GROUND
J4
M20-9981806
(Supplied loose)
GROUND
1D3,3B1
1D3,3B1
1A5,3A1
1C4
1D4
1D4
1D4
1D4,3A4
1D4,3A4
1D4,3B3
1D4,3B3
1A4,3B1
1A4
1B4,3A5
1B4
1B4,5B5
1B4,5B5
1B4,5B3
B
C
1B4
1C3,3C1
1B2,3A5
1B1
1B2
1A3,2A6,3A6
1C3,3A3
1C3
1B6
P96
TXD0
MD2n
STBYn
MD0
RESn
IOPORT_T4
P47
IRQ5n
22
24
26
28
34
18
20
30
12
14
10
16
32
36
2
4
6
8
P94
P92
P90
PC6
PC4
PC2
PC0
PA6
1B4,5C3
1B4
1B4,5C3
1C4
1C4
1C4
1C4
1B4,5B3
C
Board_VCC
J1
M20-9981806
(Supplied loose)
Board_VCC
19
21
23
25
27
29
31
33
11
13
15
17
1
35
3
5
7
9
1C3
1C3,3A3
1B2,3A5
1B1
1C3,3C1
1B4
P46
IOPORT_T3
MD1
NMIn
RXD0
P97
GROUND
D
PA5
PA7
PC1
PC3
PC5
PC7
P91
P93
P95
1B4,5B3
1B4,5B3
1C4
1C4
1C4,3A5
1C4
1B4
1B4,5C3
1B4
NC
SIZE A4
RENESAS TECHNOLOGY EUROPE LTD
Dukes Meadow, Bourne End, Buckinghamshire
UNITED KINGDOM
SCHEMATIC TITLE
D
3DK2166
SHEET TITLE
Headers
DRAWN BY
DPR
DATE
24-Aug-2004
REV DRAWING NUMBER PAGE
2
D005392_04
4
5
1
2
3
4
5
6
1
2
3
4
5
6
A
Board_VCC
A
U7
SN74HC688DW
1
2
4
6
8
11
13
15
17
3
5
7
9
12
14
16
18
G1 COMP
(DNF)
1
R99
U8
HM62W16255HCLTT-12
1A3,4B3
1A3,4B2
1A3,4A3
1A3,4A3
1B3,4A3
1B3,4A3
1B3,4B3
1B3,4A3
1B3,4B3
1B3,4A3
1B3,4B3
1B3,4A3
1B3,4B3
1B3,4A3
1B3,4B3
1B4,4C5
1B4,4C4
1B4,4C5
100K
Remove this 0R link
to disable the SRAM
R67
0R
0
Board_VCC
100K
Board_VCC
GROUND
GROUND
1
1B4,4C4
1B4,4C5
1B4,4D4
1B4,4C4
1B4,4D4
DNF_0603
2
DNF_0603
2
DNF_0603
2
DNF_0603
2
(P=Q)1
0
19
100K
R93
R79
R80
R81
R82
2
1
1
1
1
B
SRAM mapped by default
between 080000h and 0FFFFFh
Q
2
PA3
PA4
PA5
PA6
PA7
(A19)
(A20)
(A21)
(A22)
(A23)
1
P
R97
7
DNF_0603
2
100K
100K
100K
R83
R94
R95
100K
7
VCC=Board_VCC
P11
(A1)
P12
P13
P14
P15
P16
P17
P20
P21
P22
P23
P24
P25
P26
P27
PA0
PA1
PA2
(A18)
1
2
3
4
5
18
19
20
21
22
23
24
25
26
27
42
43
44
6
41
17
39
40
4MBit
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
CSn
OEn
WEn
LBn
UBn
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
IO11
IO12
IO13
IO14
IO15
IO16
2
2
1
(DNF)
B
1
1
1
1
R96
R98
2
2
2
1
2
GROUND
1B4,4D4
P93
P94
P90
(RDn)
(HWRn)
(LWRn)
C
1B4,4C4
1B4,4C4
Address decoupling
Board_VCC
1
2
4
5
9
10
12
13
U6
(DNF)
SN74HC08D
&
3
6
8
11
1C3,4B4
1C3,4A4
1D3,4B4
1D3,4A4
1D3,4B4
1D3,4A4
1D3,4B4
1D3,4A4
1B3,4B2
1B3,4B3
1B3,4B2
1B3,4B3
1B3,4B2
1B3,4B3
1B3,4B2
1B3,4B3
P60
P61
P62
P63
P64
P65
P66
P67
P30
P31
P32
P33
P34
P35
P36
P37
7
8
9
10
13
14
15
16
29
30
31
32
35
36
37
38
C
VCC=Board_VCC
C32
100nF
VCC=Board_VCC
GROUND
1
2
AND logic decoupling
D
Board_VCC
SRAM decoupling
Board_VCC
SIZE A4
RENESAS TECHNOLOGY EUROPE LTD
Dukes Meadow, Bourne End, Buckinghamshire
UNITED KINGDOM
SCHEMATIC TITLE
D
C31
100nF
1
C30
100nF
1
1
C29
100nF
3DK2166
SHEET TITLE
2
2
2
SRAM and Glue Logic
GROUND
GROUND
DRAWN BY
DPR
DATE
24-Aug-2004
REV DRAWING NUMBER PAGE
2
D005392_04
5
5
1
2
3
4
5
6
京公网安备 11010802033920号
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