ADT7516/ADT7517/ADT7518 Data Sheet........................ Universal
Change to Equation.............................................................................25
7/03—Revision 0: Initial Version
Rev. A | Page 2 of 40
ADT7518
SPECIFICATIONS
Table 1. Temperature range is as follows: A version: –40°C to +120°C. V
DD
= 2.7 V to 5.5 V, GND = 0 V, REF
IN
= 2.25 V, unless
otherwise noted.
Parameter
1
DAC DC PERFORMANCE
2,3
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Gain Error
Lower Deadband
Upper Deadband
Offset Error Drift
4
Gain Error Drift
4
DC Power Supply Rejection Ratio
4
DC Crosstalk
4
ADC DC ACCURACY
Resolution
Total Unadjusted Error (TUE)
Offset Error
Gain Error
ADC BANDWIDTH
ANALOG INPUTS
5
Input Voltage Range
DC Leakage Current
Input Capacitance
Input Resistance
THERMAL CHARACTERISTICS
6
INTERNAL TEMPERATURE SENSOR
Accuracy @ V
DD
= 3.3 V ±10%
Min
Typ
8
±0.15
±0.02
±0.4
±0.3
20
60
–12
–5
–60
200
10
3
±0.5
±2
DC
2.25
V
DD
±1
20
Max
Unit
Bits
LSB
LSB
% of FSR
% of FSR
mV
mV
ppm of FSR/°C
ppm of FSR/°C
dB
µV
Bits
% of FSR
% of FSR
% of FSR
Hz
V
V
µA
pF
MΩ
AIN1 to AIN4. C4 = 0 in Control Configuration 3.
AIN1 to AIN4. C4 = 0 in Control Configuration 3.
Conditions/Comments
±1
±0.25
±2
±2
65
100
Guaranteed monotonic over all codes.
Lower deadband exists only if offset error is
negative. See Figure 8.
Upper deadband exists if V
REF
= V
DD
and offset
plus gain error is positive. See Figure 9.
∆V
DD
= ±10%.
See Figure 5.
Max V
DD
= 5 V.
2
0
0
5
10
Internal reference used. Averaging on.
±1.5
±3
±5
±3
±5
10
°C
°C
°C
°C
°C
Bits
°C
T
A
= 85°C.
T
A
= 0°C to +85°C.
T
A
= –40°C to +120°C.
T
A
= 0°C to +85°C.
T
A
= –40°C to +120°C.
Equivalent to 0.25°C.
Drift over 10 years if part is operated at 55°C.
External transistor = 2N3906.
T
A
= 85°C.
T
A
= 0°C to +85°C.
T
A
= –40°C to +120°C.
T
A
= 0°C to +85°C.
T
A
= –40°C to +120°C.
Equivalent to 0.25°C.
High Level.
Low Level.
Accuracy @ V
DD
= 5 V ±5%
Resolution
Long-Term Drift
THERMAL CHARACTERISTICS
6
EXTERNAL TEMPERATURE SENSOR
Accuracy @ V
DD
= 3.3 V ± 10%
±0.5
±2
±2
±3
0.25
Accuracy @ V
DD
= 5 V ± 5%
Resolution
Output Source Current
THERMAL CHARACTERISTICS
6
Thermal Voltage Output
8-Bit DAC Output
Resolution
±2
±3
180
11
±1.5
±3
±5
±3
±5
10
°C
°C
°C
°C
°C
Bits
µA
µA
1
°C
Rev. A | Page 3 of 40
ADT7518
Parameter
1
Scale Factor
CONVERSION TIMES
Slow ADC
V
DD
/AIN
Internal Temperature
External Temperature
Fast ADC
V
DD
/AIN
Internal Temperature
External Temperature
ROUND ROBIN UPDATE RATE
5
Slow ADC @ 25°C
Averaging On
Averaging Off
Averaging On
Averaging Off
Fast ADC @ 25°C
Averaging On
Averaging Off
Averaging On
Averaging Off
DAC EXTERNAL REFERENCE INPUT
4
V
REF
Input Range
V
REF
Input Impedance
Reference Feedthrough
Channel-to-Channel Isolation
ON-CHIP REFERENCE
Reference Voltage
4
Temperature Coefficient
4
OUTPUT CHARACTERISTICS
4
Output Voltage
7
DC Output Impedance
Short-Circuit Current
Power-Up Time
DIGITAL INPUTS
4
Input Current
V
IL
, Input Low Voltage
V
IH
, Input High Voltage
Pin Capacitance
SCL, SDA Glitch Rejection
LDAC Pulse Width
Min
Typ
8.97
17.58
Max
Unit
mV/°C
mV/°C
Conditions/Comments
0 V to V
REF
output. T
A
= –40°C to +120°C.
0 V to 2 V
REF
output. T
A
= –40°C to +120°C.
Single channel mode.
Averaging (16 samples) on.
Averaging off.
Averaging (16 samples) on.
Averaging off.
Averaging (16 samples) on.
Averaging off.
Averaging (16 samples) on.
Averaging off.
Averaging (16 samples) on.
Averaging off.
Averaging (16 samples) on.
Averaging off.
Time to complete one measurement cycle
through all channels.
AIN1 and AIN2 are selected on Pins 7 and 8.
AIN1 and AIN2 are selected on Pins 7 and 8.
D+ and D– are selected on Pins 7 and 8.
D+ and D– are selected on Pins 7 and 8.
AIN1 and AIN2 are selected on Pins 7 and 8.
AIN1 and AIN2 are selected on Pins 7 and 8.
D+ and D– are selected on Pins 7 and 8.
D+ and D– are selected on Pins 7 and 8.
Buffered reference.
Buffered reference and power-down mode.
Frequency = 10 kHz.
Frequency = 10 kHz.
11.4
712
11.4
712
24.22
1.51
712
44.5
2.14
134
14.25
890
ms
µs
ms
µs
ms
ms
µs
µs
ms
µs
ms
µs
79.8
4.99
94.76
9.26
6.41
400.84
21.77
3.07
1
>10
–90
–75
2.25
80
0.001
0.5
25
16
2.5
5
±1
0.8
1.89
3
10
50
V
DD
− 0.1
V
DD
ms
ms
ms
ms
ms
µs
ms
ms
V
MΩ
dB
dB
V
ppm/°C
V
Ω
mA
mA
µs
µs
µA
V
V
pF
ns
ns
Rev. A | Page 4 of 40
This is a measure of the minimum and maximum
drive capability of the output amplifier.
V
DD
= 5 V.
V
DD
= 3 V.
Coming out of power-down mode. V
DD
= 5 V.
Coming out of power-down mode. V
DD
= 3.3 V.
V
IN
= 0 V to V
DD.
20
All digital inputs.
Input filtering suppresses noise spikes of less
than 50 ns.
Edge triggered input.
ADT7518
Parameter
1
DIGITAL OUTPUT
Digital High Voltage, V
OH
Output Low Voltage, V
OL
Output High Current, I
OH
Output Capacitance, C
OUT
INT/INT Output Saturation Voltage
I C TIMING CHARACTERISTICS
Serial Clock Period, t
1
Data In Setup Time to SCL High, t
2
Data Out Stable after SCL Low, t
3
SDA Low Setup Time to SCL
Low (Start Condition), t
4
SDA High Hold Time after SCL
High (Stop Condition), t
5
SDA and SCL Fall Time, t
6
SPI TIMING CHARACTERISTICS
4, 10
CS to SCLK Setup Time, t
1
SCLK High Pulse Width, t
2
SCLK Low Pulse Width, t
3
Data Access Time after SCLK
Falling Edge, t
4 11
Data Setup Time Prior to SCLK
Rising Edge, t
5
Data Hold Time after SCLK Rising
Edge, t
6
CS to SCLK Hold Time, t
7
CS to DOUT High Impedance, t
8
POWER REQUIREMENTS
V
DD
V
DD
Settling Time
I
DD
(Normal Mode)
12
I
DD
(Power-Down Mode)
Power Dissipation
2
8, 9
Min
2.4
Typ
Max
Unit
V
V
mA
pF
V
µs
ns
ns
ns
ns
Conditions/Comments
I
SOURCE
= I
SINK
= 200 µA.
I
OL
= 3 mA.
V
OH
= 5 V.
I
OUT
= 4 mA.
Fast Mode I
2
C. See Figure 2.
See Figure 2.
See Figure 2.
See Figure 2.
See Figure 2.
See Figure 3.
See Figure 3.
See Figure 3.
0.4
1
50
0.8
2.5
50
0
50
50
90
0
50
50
35
20
0
0
40
2.7
5.5
50
3
3
10
10
10
33
ns
ns
ns
ns
ns
ns
ns
µs
ns
V
ms
mA
mA
µA
µA
mW
µW
See Figure 3.
See Figure 3.
See Figure 3.
See Figure 3.
2.2
V
DD
settles to within 10% of its final voltage level.
V
DD
= 3.3 V, V
IH
= V
DD
, and V
IL
= GND.
V
DD
= 5 V, V
IH
= V
DD
, and V
IL
= GND.
V
DD
= 3.3 V, V
IH
= V
DD
, and V
IL
= GND.
V
DD
= 5 V, V
IH
= V
DD
, and V
IL
= GND.
V
DD
= 3.3 V. Normal mode.
V
DD
= 3.3 V. Shutdown mode.
1
2
See the Terminology section.
DC specifications are tested with the outputs unloaded.
3
Linearity is tested using a reduced code range: ADT7518 (Code 8 to 255).
4
Guaranteed by design and characterization, not production tested.
5
Round robin is the continuous sequential measurement of the following channels: V
DD
, internal temperature, external temperature (AIN1, AIN2), AIN3, and AIN4.
6
The temperature accuracy specifications are valid when the internal reference is not being used by the on-chip DAC. For new designs, the ADT7519 is recommended
as it does not have this limitation.
7
For the amplifier output to reach its minimum voltage, the offset error must be negative. For the amplifier output to reach its maximum voltage (V
REF
= V
DD
), the offset
plus gain error must be positive.
8
The SDA and SCL timing is measured with the input filters turned on to meet the fast-mode I
2
C specification. Switching off the input filters improves the transfer rate
but has a negative effect on the EMC behavior of the part.
9
Guaranteed by design, not production tested.
10
All input signals are specified with tr = tf = 5 ns (10% to 90% of V
DD
), and timed from a voltage level of 1.6 V.
11
Measured with the load circuit shown in Figure 4.
12
The I
DD
specification is valid for all DAC codes and full-scale analog input voltages. Interface inactive. All DACs and ADCs active. Load currents excluded.
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