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CAT24WC128J-REV-A

Description
EEPROM, 16KX8, Serial, CMOS, PDSO8, SOIC-8
Categorystorage    storage   
File Size402KB,9 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Download Datasheet Parametric View All

CAT24WC128J-REV-A Overview

EEPROM, 16KX8, Serial, CMOS, PDSO8, SOIC-8

CAT24WC128J-REV-A Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerCatalyst
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)0.4 MHz
JESD-30 codeR-PDSO-G8
JESD-609 codee0
length4.9 mm
memory density131072 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count16384 words
character code16000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize16KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)240
Certification statusNot Qualified
Maximum seat height1.75 mm
Serial bus typeI2C
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2.5 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9 mm
Maximum write cycle time (tWC)10 ms
Base Number Matches1
CAT24WC128
128K-Bit I
2
C Serial CMOS EEPROM
FEATURES
I
1MHz I
2
C Bus Compatible*
I
1.8 to 6 Volt Operation
I
Low Power CMOS Technology
I
64-Byte Page Write Buffer
I
Self-Timed Write Cycle with Auto-Clear
I
Commercial, Industrial and Automotive
I
Write Protect Feature
H
GEN
FR
ALO
EE
LE
A
D
F
R
E
E
TM
– Entire Array Protected When WP at V
IH
I
100,000 Program/Erase Cycles
I
100 Year Data Retention
I
8-Pin DIP, 8-Pin SOIC or 14-pin TSSOP
I
"Green" Package Options Available
Temperature Ranges
DESCRIPTION
The CAT24WC128 is a 128K-bit Serial CMOS E
2
PROM
internally organized as 16384 words of 8 bits each.
Catalyst’s advanced CMOS technology substantially
reduces device power requirements. The
CAT24WC128 features a 64-byte page write buffer.
The device operates via the I
2
C bus serial interface and
is available in 8-pin DIP, 8-pin SOIC or 14-pin TSSOP
packages.
PIN CONFIGURATION
DIP Package (P, L)
NC
NC
NC
VSS
1
2
3
4
8
7
6
5
VCC
WP
TSSOP Package (U14, Y14)
SCL
VCC
1
14
NC
SDA
NC
WP
13
2
NC
NC
12
3
NC
NC
NC
VSS
4
5
6
7
11
10
9
8
NC
NC
SCL
SDA
BLOCK DIAGRAM
EXTERNAL LOAD
DOUT
ACK
VCC
VSS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
512
SDA
START/STOP
LOGIC
SENSE AMPS
SHIFT REGISTERS
SOIC Package (J, W, K, X)
NC
NC
NC
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
XDEC
WP
CONTROL
LOGIC
256
EEPROM
256X512
PIN FUNCTIONS
Pin Name
SDA
SCL
WP
V
CC
V
SS
Function
Serial Data/Address
Serial Clock
Write Protect
+1.8V to +6V Power Supply
Ground
SCL
STATE COUNTERS
HIGH VOLTAGE/
TIMING CONTROL
DATA IN STORAGE
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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