Philips Semiconductors
Product specification
Logic level TOPFET
SMD version of BUK106-50L/S
DESCRIPTION
Monolithic temperature and
overload protected logic level power
MOSFET in a 5 pin surface
mounting plastic envelope, intended
as a general purpose switch for
automotive systems and other
applications.
BUK116-50L/S
QUICK REFERENCE DATA
SYMBOL
V
DS
I
D
P
tot
T
j
R
DS(ON)
PARAMETER
Continuous drain source voltage
Continuous drain current
Total power dissipation
Continuous junction temperature
Drain-source on-state resistance
V
IS
= 5 V
V
IS
= 8 V
PARAMETER
Protection supply voltage
BUK116-50L
BUK116-50S
MAX.
50
50
125
150
35
28
NOM.
5
10
UNIT
V
A
W
˚C
mΩ
mΩ
UNIT
V
V
APPLICATIONS
General controller for driving
lamps
motors
solenoids
heaters
SYMBOL
V
PSN
FEATURES
Vertical power DMOS output
stage
Low on-state resistance
Logic and protection supply
from separate pin
Low operating supply current
Overload protection against
over temperature
Overload protection against
short circuit load
Latched overload protection
reset by protection supply
Protection circuit condition
indicated by flag pin
5 V logic compatible input level
Separate input pin
for higher frequency drive
ESD protection on input, flag
and protection supply pins
Over voltage clamping for turn
off of inductive loads
Both linear and switching
operation are possible
FUNCTIONAL BLOCK DIAGRAM
PROTECTION SUPPLY
DRAIN
FLAG
O/V
CLAMP
POWER
MOSFET
INPUT
LOGIC AND
PROTECTION
SOURCE
Fig.1. Elements of the TOPFET.
PINNING - SOT426
PIN
1
2
3
4
5
mb
input
flag
(connected to mb)
protection supply
source
drain
DESCRIPTION
PIN CONFIGURATION
mb
SYMBOL
D
TOPFET
P
F
I
P
3
1 2
4 5
S
Fig. 2.
Fig. 3.
July 1996
1
Rev 1.000
Philips Semiconductors
Product specification
Logic level TOPFET
SMD version of BUK106-50L/S
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
DSS
V
IS
V
FS
V
PS
I
D
I
D
I
DRM
P
tot
T
stg
T
j
T
sold
PARAMETER
Voltages
Continuous off-state drain source
voltage
1
Continuous input voltage
Continuous flag voltage
Continuous supply voltage
Currents
Continuous drain current
Continuous drain current
Repetitive peak on-state drain current
Thermal
Total power dissipation
Storage temperature
Junction temperature
2
Lead temperature
T
mb
≤
25 ˚C
T
mb
≤
100 ˚C
T
mb
≤
25 ˚C
T
mb
= 25 ˚C
-
continuous
during soldering
CONDITIONS
V
IS
= 0 V
-
-
-
V
IS
=
MIN.
-
0
0
0
-
-
-
-
-
-55
-
-
BUK116-50L/S
MAX.
50
11
11
11
8
5
50 45
31 28
200 180
125
150
150
250
UNIT
V
V
V
V
V
A
A
A
W
˚C
˚C
˚C
OVERLOAD PROTECTION LIMITING VALUES
With the protection supply
connected, TOPFET can protect
itself from two types of overload -
over temperature and short circuit
load.
SYMBOL
V
PSP
PARAMETER
Protection supply voltage
3
An n-MOS transistor turns on
between the input and source to
quickly discharge the power
MOSFET gate capacitance.
CONDITIONS
V
IS
=
for valid protection
BUK116-50L
BUK116-50S
For internal overload protection to
remain latched while the control
circuit is high, external series input
resistance must be provided. Refer
to INPUT CHARACTERISTICS.
MIN.
8
4.4
5.4
-
-
-
-
-
5
4
5
MAX.
-
-
-
50
50
24
45
4
UNIT
V
V
V
V
V
V
V
kW
V
DDP(T)
Over temperature protection
V
PS
= V
PSN
Protected drain source supply voltage V
IS
= 10 V; R
I
≥
2 kΩ
V
IS
= 5 V; R
I
≥
1 kΩ
Short circuit load protection
V
PS
= V
PSN
; L
≤
10
µH
4
Protected drain source supply voltage V
IS
= 10 V; R
I
≥
2 kΩ
V
IS
= 5 V; R
I
≥
1 kΩ
Instantaneous overload dissipation
V
DDP(P)
P
DSM
ESD LIMITING VALUE
SYMBOL
V
C
PARAMETER
Electrostatic discharge capacitor
voltage
CONDITIONS
Human body model;
C = 250 pF; R = 1.5 kΩ
MIN.
-
MAX.
2
UNIT
kV
1
Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
2
A higher T
j
is allowed as an overload condition but at the threshold T
j(TO)
the over temperature trip operates to protect the switch.
3
The minimum supply voltage required for correct operation of the overload protection circuits.
4
The device is able to self-protect against a short circuit load providing the drain-source supply voltage does not exceed V
DDP(P)
maximum.
For further information, refer to OVERLOAD PROTECTION CHARACTERISTICS.
July 1996
2
Rev 1.000
Philips Semiconductors
Product specification
Logic level TOPFET
SMD version of BUK106-50L/S
OVERVOLTAGE CLAMPING LIMITING VALUES
BUK116-50L/S
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL
I
DRRM
E
DSM
E
DRM
PARAMETER
CONDITIONS
MIN.
-
-
-
MAX.
50
1
80
UNIT
A
J
mJ
Repetitive peak clamping drain current R
IS
≥
100
Ω
1
Non-repetitive inductive turn-off
I
DM
= 27 A; R
IS
≥
100
Ω
2
energy
Repetitive inductive turn-off energy
R
IS
≥
100
Ω;
T
mb
≤
85 ˚C;
I
DM
= 16 A; V
DD
≤
20 V;
f = 250 Hz
Repetitive peak drain to input current
3
R
IS
= 0
Ω;
t
p
≤
1 ms
I
DIRM
-
50
mA
REVERSE DIODE LIMITING VALUE
SYMBOL
I
S
PARAMETER
Continuous forward current
CONDITIONS
T
mb
= 25 ˚C;
V
IS
= V
PS
= V
FS
= 0 V
MIN.
-
MAX.
50
UNIT
A
THERMAL CHARACTERISTIC
SYMBOL
R
th j-mb
PARAMETER
Thermal resistance
Junction to mounting base
-
-
0.8
1.0
K/W
CONDITIONS
MIN.
TYP.
MAX.
UNIT
STATIC CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
V
(CL)DSR
V
(CL)DSR
I
DSS
I
DSR
I
DSR
R
DS(ON)
PARAMETER
Drain-source clamping voltage
Drain-source clamping voltage
CONDITIONS
R
IS
= 100
Ω;
I
D
= 10 mA
MIN.
50
50
-
-
-
-
-
TYP.
-
-
0.5
1
10
22
28
MAX.
65
70
10
20
100
28
35
UNIT
V
V
µA
µA
µA
mΩ
mΩ
R
IS
= 100
Ω;
I
DM
= 1 A; t
p
≤
300
µs;
δ ≤
0.01
Zero input voltage drain current V
DS
= 12 V; V
IS
= 0 V
Drain source leakage current
V
DS
= 50 V; R
IS
= 100
Ω;
Drain source leakage current
V
DS
= 40 V; R
IS
= 100
Ω;
T
j
= 125 ˚C
Drain-source on-state
resistance
I
DM
= 25 A;
t
p
≤
300
µs; δ ≤
0.01
V
IS
= 8 V
V
IS
= 5 V
1
The input pin must be connected to the source pin by a specified external resistance to allow the power MOSFET gate source voltage to
become sufficiently positive for active clamping. Refer to INPUT CHARACTERISTICS.
2
While the protection supply voltage is connected, during overvoltage clamping it is possible that the overload protection may operate at
energies close to the limiting value. Refer to OVERLOAD PROTECTION CHARACTERISTICS.
3
Shorting the input to source with low resistance inhibits the internal overvoltage protection by preventing the power MOSFET gate source
voltage becoming positive.
July 1996
3
Rev 1.000
Philips Semiconductors
Product specification
Logic level TOPFET
SMD version of BUK106-50L/S
OVERLOAD PROTECTION CHARACTERISTICS
With adequate protection supply
voltage TOPFET detects when one
of the overload thresholds is
exceeded.
SYMBOL
E
DS(TO)
t
d sc
T
j(TO)
PARAMETER
Short circuit load protection
1
Overload threshold energy
Response time
Provided there is adequate input
series resistance it switches off
and remains latched off until reset
by the protection supply pin.
CONDITIONS
V
PS
= V
PSN2
; T
mb
= 25 ˚C; L
≤
10
µH
V
DD
= 13 V; V
IS
= 10 V
V
DD
= 13 V; V
IS
= 10 V
BUK116-50L/S
Refer also to OVERLOAD
PROTECTION LIMITING VALUES
and INPUT CHARACTERISTICS.
MIN.
-
-
150
TYP.
550
0.4
-
MAX.
-
-
-
UNIT
mJ
ms
˚C
Over temperature protection
V
PS
= V
PSN
Threshold junction temperature from I
D
≥
2.5 A
3
TRANSFER CHARACTERISTICS
T
mb
= 25 ˚C
SYMBOL
g
fs
I
D
PARAMETER
Forward transconductance
Drain current
4
CONDITIONS
V
DS
= 12 V; I
DM
= 25 A t
p
≤
300
µs;
δ ≤
0.01
V
DS
= 13 V;
V
IS
= 5 V
V
IS
= 10 V
MIN.
17
-
TYP.
28
80
160
MAX.
-
-
-
UNIT
S
A
A
PROTECTION SUPPLY CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
I
PS
,
I
PSL
PARAMETER
Protection supply
Protection supply current
CONDITIONS
normal operation or
protection latched
BUK116-50L
BUK116-50S
T
j
= 150 ˚C
V
(CL)PS
Protection clamp voltage
I
P
= 1.35 mA
MIN.
TYP.
MAX.
UNIT
V
PSR
Protection reset voltage
5
V
PS
= 5 V
V
PS
= 10 V
-
-
1.5
1.0
11
0.2
0.4
2.5
-
13
0.35
1.0
3.5
-
-
mA
mA
V
V
V
REVERSE DIODE CHARACTERISTICS
T
mb
= 25 ˚C
SYMBOL
V
SDS
t
rr
PARAMETER
Forward voltage
Reverse recovery time
CONDITIONS
I
S
= 20 A; V
IS
= V
PS
= V
FS
= 0 V;
t
p
= 300
µs
not applicable
6
MIN.
-
-
TYP.
0.9
-
MAX.
1.2
-
UNIT
V
-
1
The short circuit load protection is able to save the device providing the instantaneous on-state dissipation is less than the limiting value for
P
DSM
, which is always the case when V
DS
is less than V
DSP
maximum.
2
At the appropriate nominal protection supply voltage for each type. Refer to QUICK REFERENCE DATA.
3
The over temperature protection feature requires a minimum on-state drain source voltage for correct operation. The specified minimum I
D
ensures this condition.
4
During overload condition. Refer also to OVERLOAD PROTECTION LIMITING VALUES and CHARACTERISTICS.
5
The supply voltage below which the overload protection circuits will be reset.
6
The reverse diode of this type is not intended for applications requiring fast reverse recovery.
July 1996
4
Rev 1.000
Philips Semiconductors
Product specification
Logic level TOPFET
SMD version of BUK106-50L/S
INPUT CHARACTERISTICS
T
mb
= 25 ˚C unless otherwise specified
SYMBOL
V
IS(TO)
I
IS
V
(CL)IS
R
ISL
PARAMETER
Normal operation
Input threshold voltage
Input current
Input clamp voltage
Overload protection latched
Input resistance
1
V
PS
= 5 V
V
PS
= 10 V
Application information
External input resistances for
internal overvoltage clamping
2
internal overload protection
3
I
I
= 5 mA;
T
mb
= 150 ˚C
I
I
= 5 mA;
T
mb
= 150 ˚C
-
-
-
-
V
DS
= 5 V; I
D
= 1 mA
T
mb
= 150 ˚C
V
IS
= 10 V
I
I
= 1 mA
1.0
0.5
-
11
CONDITIONS
MIN.
BUK116-50L/S
TYP.
1.5
-
10
13
55
95
35
60
MAX.
2.0
-
100
-
-
-
-
-
UNIT
V
V
nA
V
Ω
Ω
Ω
Ω
Ω
kΩ
kΩ
R
IS
R
I
(see figure 29)
R
I
=
∞ Ω;
R
IS
=
∞ Ω;
V
DS
> 30 V
V
II
= 5 V
V
II
= 10 V
100
1
2
-
-
-
-
-
-
SWITCHING CHARACTERISTICS
T
mb
= 25 ˚C; R
I
= 50
Ω;
R
IS
= 50
Ω
(see figure 29); resistive load R
L
= 10
Ω.
For waveforms see figure 28.
SYMBOL
t
d on
t
r
t
d off
t
f
PARAMETER
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 15 V; V
IS
: 10 V
⇒
0 V
CONDITIONS
V
DD
= 15 V; V
IS
: 0 V
⇒
10 V
MIN.
-
-
-
-
TYP.
10
35
280
120
MAX.
-
-
-
-
UNIT
ns
ns
ns
ns
CAPACITANCES
T
mb
= 25 ˚C; f = 1 MHz
SYMBOL
C
iss
C
oss
C
rss
C
pso
C
fso
PARAMETER
Input capacitance
Output capacitance
Reverse transfer capacitance
Protection supply pin
capacitance
Flag pin capacitance
CONDITIONS
V
DS
= 25 V; V
IS
= 0 V
V
DS
= 25 V; V
IS
= 0 V
V
DS
= 25 V; V
IS
= 0 V
V
PS
= 10 V
V
FS
= 10 V; V
PS
= 0 V
MIN.
-
-
-
-
-
TYP.
1250
650
150
30
20
MAX.
1800
1000
250
-
-
UNIT
pF
pF
pF
pF
pF
1
The resistance of the internal transistor which discharges the power MOSFET gate capacitance when overload protection operates.
The external drive circuit should be such that the input voltage does not exceed V
IS(TO)
minimum when the overload protection has
operated. Refer also to figure for latched input characteristics.
2
Applications using a lower value for R
IS
would require external overvoltage protection.
3
For applications requiring a lower value for R
I
, an external overload protection strategy is possible using the flag pin to ‘tell’ the control circuit to
switch off the input.
July 1996
5
Rev 1.000
FPGA/CPLD
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