a
FEATURES
10-Bit, 100 MSPS ADC
Low Power: 600 mW Typical at 100 MSPS
On-Chip Track/Hold
230 MHz Analog Bandwidth
SINAD = 54 dB @ 41 MHz
On–Chip Reference
1 V p-p Analog Input Range
Single Supply Operation: +5 V or –5 V
Differential Clock Input
Available in Standard Military Drawing Version
APPLICATIONS
Digital Communications
Signal Intelligence
Digital Oscilloscopes
Spectrum Analyzers
Medical Imaging
Radar
HDTV
GENERAL DESCRIPTION
AD9070
AIN
AIN
10-Bit, 100 MSPS
A/D Converter
AD9070
FUNCTIONAL BLOCK DIAGRAM
VREF
IN
VREF
REF
OUT COMP BYPASS
SOIC (BR)
PACKAGE
ONLY
–2.5V
T/H
ADC
ENCODE
LOGIC
10
D9 – D0
SUM
AMP
ENCODE
ENCODE
TIMING
DAC
ADC
OR
DIP
PACKAGE
ONLY
V
EE
GND
The AD9070 is a monolithic sampling analog-to-digital
converter with an on-chip track-and-hold circuit and ECL
digital interfaces. The product operates at a 100 MSPS
conversion rate with outstanding dynamic performance over
its full operating range.
The ADC requires only a single –5 V supply and an encode
clock for full performance operation. The digital outputs are
ECL compatible, while a differential clock input accommodates
a wide range of logic levels. The AD9070 may be operated in a
Positive ECL (PECL) environment with a single +5 V supply.
An Out-of-Range output (OR) is available in the DIP version to
indicate that a conversion result is outside the operating range.
In both package styles, the output data are held at saturation
levels during an out-of-range condition.
The input amplifier supports single-ended interfaces. An
internal –2.5 V reference is included in the SOIC packaged
device (an external voltage reference is required for the DIP
version).
Fabricated on an advanced bipolar process, the AD9070
is available in a plastic SOIC package specified over the
industrial temperature range (–40°C to +85°C), and a full
MIL-PRF-38534 QML version (–55°C to +125°C) in a
ceramic Dual-in-Line Package (DIP).
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD9070–SPECIFICATIONS
Parameter
RESOLUTION
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
No Missing Codes
Gain Error
1
Gain Tempco
1
ANALOG INPUT
Input Voltage Range (with Respect to
AIN)
Common-Mode Voltage
Input Offset Voltage
Input Resistance
Input Capacitance
Input Bias Current
Analog Bandwidth, Full Power
REFERENCE OUTPUT
Output Voltage
Temperature Coefficient
SWITCHING PERFORMANCE
Maximum Conversion Rate
Minimum Conversion Rate
Encode Pulse Width High (t
EH
)
Encode Pulse Width Low (t
EL
)
Aperture Delay (t
A
)
Aperture Uncertainty (Jitter)
Output Valid Time (t
V
)
2
Output Propagation Delay (t
PD
)
2
Output Rise Time (t
R
)
Output Fall Time (t
F
)
DIGITAL INPUTS
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current
Logic “0” Current
Input Capacitance
DIGITAL OUTPUTS
Logic “1” Voltage
Logic “0” Voltage
Output Coding
POWER SUPPLY
V
EE
Supply Current (V
EE
= –5 V)
Power Dissipation
3
Power Supply Sensitivity
4
+25°C
Full
+25°C
Full
Full
+25°C
Full
Full
Full
Full
+25°C
Full
+25°C
Full
+25°C
+25°C
Full
+25°C
Full
Full
Full
Full
+25°C
+25°C
+25°C
+25°C
Full
Full
Full
Full
Full
Full
Full
Full
+25°C
Full
Full
Temp
(V
EE
= –5 V, ENCODE = 100 MSPS, outputs loaded with 100
otherwise noted)
Test
Level Min
AD9070BR
Typ
Max
10
I
VI
I
VI
VI
I
VI
V
V
V
I
I
I
I
V
I
I
V
VI
V
VI
IV
IV
IV
V
V
VI
VI
VI
VI
IV
IV
VI
VI
V
VI
VI
±
0.6
±
0.7
±
0.6
±
0.9
Guaranteed
±
1
115
±
512
–2.5
±
0.2
±
7
±
18
±
8
40
40
3
75
200
75
230
–2.5
170
–2.6
+1.25/–1.0
+1.5/–1.0
±
1.5
±
4
to –2 V unless
5962-9756301HXC
Min
Typ
Max
10
±
0.6
±
0.9
±
0.6
±
1.5
Guaranteed
±
1
±
2
130
+1.25/–1.0
+2.00/–1.0
±
1.5
±
2.25
±
4
±
6
Units
Bit
LSB
LSB
LSB
LSB
% FS
% FS
ppm/°C
mV p-p
V
mV
mV
kΩ
kΩ
pF
µA
µA
MHz
V
ppm/°C
MSPS
MSPS
ns
ns
ns
ps rms
ns
ns
ns
ns
V
V
µA
µA
pF
V
V
10
10
10
±
512
–2.5
±
0.2
±
7
±
18
±
9
±
20
40
40
3
75
200
75
200
230
N/A
N/A
–2.4
100
4.5
4.5
0.85
2.5
2.6
3.0
0.5
0.5
40
13
13
100
4.5
4.5
0.85
2.5
2.6
3.0
0.5
0.5
40
13
13
1.5
1.5
4.0
4.0
1.2
1.2
–0.4
–1.5
±
10
±
10
–1.1
–0.4
–1.5
±
10
±
10
3
–1.1
3
–1.15
–1.60
Twos Complement
80
400
120
600
150
750
–1.1
–1.65
Twos Complement
80
400
120
600
150
750
Full
Full
VI
VI
mA
mW
+25°C
I
0.005
0.012
0.005
0.012
V/V
–2–
REV. B
AD9070
Parameter
DYNAMIC PERFORMANCE
5
Transient Response
Overvoltage Recovery Time
Signal-to-Noise Ratio (SNR)
(Without Harmonics)
f
IN
= 10.3 MHz
f
IN
= 41 MHz
Signal-to-Noise Ratio (SINAD)
(With Harmonics)
f
IN
= 10.3 MHz
f
IN
= 41 MHz
Effective Number of Bit
f
IN
= 10.3 MHz
f
IN
= 41 MHz
2nd Harmonic Distortion
f
IN
= 10.3 MHz
f
IN
= 41 MHz
3rd Harmonic Distortion
f
IN
= 10.3 MHz
f
IN
= 41 MHz
Two-Tone Intermod Distortion (IMD)
f
IN
= 10.3 MHz
f
IN
= 41 MHz
Temp
+25°C
+25°C
Test
Level
V
V
AD9070BR
Min
Typ
Max
3
4
5962-9756301HXC
Min
Typ
Max
3
4
Units
ns
ns
+25°C
Full
+25°C
Full
I
V
I
V
55
54
57
56
56
55
55
54
57
55
56
54
dB
dB
dB
dB
+25°C
Full
+25°C
Full
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
+25°C
I
V
I
V
I
I
I
I
I
I
V
V
54
51
56
55
54
53
9.2
8.9
70
63
71
61
70
60
54
51
56
54
54
52
9.2
8.9
70
63
71
61
70
60
dB
dB
dB
dB
Bits
Bits
dBc
dBc
dBc
dBc
dBc
dBc
8.8
8.3
63
58
65
57
8.8
8.3
63
58
65
57
NOTES
1
Gain error and gain temperature coefficient are based on the ADC only (with a fixed –2.5 V external reference).
2
t
V
and t
PD
are measured from the threshold crossing of the ENCODE input to the 50% levels of the digital outputs. The output ac load during test is 10 pF.
3
Power dissipation is measured under the following conditions: f
S
100 MSPS, analog input is –1 dBfs at 10.3 MHz. Power dissipation does not include the current of
the external ECL pull-down resistors that set the current in the ECL output followers.
4
A change in input offset voltage with respect to a change in V
EE
.
5
SNR/harmonics based on an analog input voltage of –1.0 dBfs referenced to a 1.024 V full-scale input range.
Typical thermal impedance for the R style (SOIC) 28-lead package:
θ
JC
= 23°C/W,
θ
CA
= 48°C/W,
θ
JA
= 71°C/W.
Typical thermal impedance for the DH style (Ceramic DIP) 28-lead package:
θ
JC
= 8°C/W,
θ
CA
= 43°C/W,
θ
JA
= 51°C/W.
Contact DSCC to obtain the latest revision of the 5962-9756301 drawing.
Specifications subject to change without notice.
SAMPLE N–1
SAMPLE N
SAMPLE N+3
SAMPLE N+4
AIN
t
A
t
EH
ENCODE
ENCODE
SAMPLE N+1
SAMPLE N+2
t
EL
1/fs
t
PD
D9–D0
DATA N–4
DATA N–3
DATA N–2
DATA N–1
DATA N
t
V
DATA N+1
Figure 1. Timing Diagram
REV. B
–3–
AD9070
ABSOLUTE MAXIMUM RATINGS*
Table I. Output Coding
V
EE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –6 V
Analog Inputs . . . . . . . . . . . . . . . . . . . . . V
EE
–1 V to +1.0 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . V
EE
to 0.0 V
VREF IN, VREF OUT . . . . . . . . . . . . . . . . . . . . V
EE
to 0.0 V
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Operating Temperature . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . +175°C
Maximum Case Temperature . . . . . . . . . . . . . . . . . . +150°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions outside of those indicated in the operation
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may affect device reliability.
Step
1024
1023
1022
•
•
•
513
512
511
•
•
•
1
0
–1
AIN–AIN
≥
0.512 V
0.511 V
0.510 V
•
•
•
0.001 V
0.000 V
–0.001 V
•
•
•
–0.511 V
–0.512 V
≤
–0.513 V
Code
>511
511
510
•
•
•
1
0
–1
•
•
•
–511
–512
<512
Twos
Complement
01 1111 1111
01 1111 1111
01 1111 1110
•
•
•
00 0000 0001
00 0000 0000
11 1111 1111
•
•
•
10 0000 0001
10 0000 0000
10 0000 0000
OR
1
0
0
•
•
•
0
0
0
•
•
•
0
0
1
EXPLANATION OF TEST LEVELS
Test Level
I
– 100% production tested.
II – 100% production tested at +25°C and sample tested at
specified temperatures.
III – Sample tested only.
IV – Parameter is guaranteed by design and characterization
testing.
V – Parameter is a typical value only.
VI – 100% production tested at +25°C; guaranteed by design
and characterization testing for industrial temperature
range; 100% production tested at temperature extremes
for military devices.
Model
ORDERING GUIDE
Temperature Range Package Option*
R-28
Evaluation Board
DH-28
AD9070BR
–40°C to +85°C
AD9070/PCB
+25°C
5962-9756301HXC –55°C to +125°C
*DH = Ceramic DIP; R = Small Outline IC (SOIC).
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9070 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. B
AD9070
PIN FUNCTION DESCRIPTIONS
Pin Numbers
AD9070BR
AD9070DIP
R Package
D Package
1, 7, 12, 21, 23
2, 8, 11, 20, 22
3
4
5
6
9
10
13
14
28–24, 19–15
N/A
1, 7, 9, 14, 21
2, 6, 8, 10, 13, 15, 22
N/A
3
N/A
N/A
4
5
11
12
27–23, 20–16
28
Name
V
EE
GND
VREF OUT
VREF IN
COMP
REF BYPASS
AIN
AIN
ENCODE
ENCODE
D9–D0
OR
Function
Negative Power Supply. Nominally –5.0 V.
Ground.
Internal Reference Output (–2.5 V typical); Bypass with 0.1
µF
to Ground.
Reference Input for ADC (–2.5 V typical).
Internal Amplifier Compensation, 0.1
µF
to V
EE
.
Reference Bypass Node, 0.1
µF
to V
EE
.
Analog Input – Complement.
Analog Input – True.
Encode Clock for ADC (ADC Samples on Rising Edge of ENCODE).
Encode Clock Complement (ADC Samples on Falling Edge of
ENCODE).
Digital Outputs of ADC. D9 is the MSB. Data is twos complement.
Out-of-Range Output. Goes HIGH when the converted sample is more
positive than 1FFh or more negative than 200h (Twos Complement Coding).
PIN CONFIGURATIONS
SOIC
V
EE
1
GND 2
VREF OUT 3
VREF IN 4
COMP 5
REF BYPASS 6
V
EE
7
28 D9 (MSB)
27 D8
26 D7
25 D6
24 D5
Ceramic DIP
V
EE
1
GND 2
VREF IN 3
AIN
4
AIN 5
GND 6
V
EE
7
28 OR
27 D9 (MSB)
26 D8
25 D7
24 D6
AD9070BR
23 V
EE
AD9070DIP
23 D5
TOP VIEW 22 GND
(Not to Scale)
21 V
EE
GND 8
AIN
9
20 GND
19 D4
18 D3
17 D2
16 D1
15 D0 (LSB)
TOP VIEW 22 GND
(Not to Scale)
21 V
EE
GND 8
V
EE
9
GND 10
ENCODE 11
ENCODE
12
GND 13
V
EE
14
20 D4
19 D3
18 D2
17 D1
16 D0 (LSB)
15 GND
AIN 10
GND 11
V
EE
12
ENCODE 13
ENCODE
14
REV. B
–5–
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