HD74AC195
4-bit Parallel-Access Shift Register
REJ03D0260–0200Z
(Previous ADE-205-380 (Z))
Rev.2.00
Jul.16.2004
Description
This shift register features parallel inputs, parallel outputs, J-K serial inputs, Shift/Load control input, and a direct
overriding clear. This shift register can operate in two modes: Parallel load; Shift from Q
0
towards Q
3
.
Parallel loading is accomplished by applying the four bits of data, and taking the
PE
Input low. The data is loaded into
the associated flip-flops and appears at the outputs after the positive transition of the CP input. During parallel loading,
serial data flow is inhibited. Serial shifting occurs synchronously when the
PE
input is high. Serial data for this mode
is entered at the J-K inputs. These inputs allow the first stage to perform as a J-K or toggle flip-flop as shown in the
function table.
Features
•
Shift Right and Parallel Load Capability
•
J-K (D-Type) Inputs to First Stage
•
Complement Output from Last Stage
•
Asynchronous Master Reset
•
Outputs Source/Sink 24 mA
•
Ordering Information
Part Name
HD74AC195FPEL
HD74AC195RPEL
Package Type
SOP-16 pin (JEITA)
Package Code Package Abbreviation Taping Abbreviation (Quantity)
FP-16DAV
FP
RP
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
SOP-16 pin (JEDEC) FP-16DNV
Notes: 1. Please consult the sales office for the above package availability.
2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of
the package code.
Rev.2.00, Jul.16.2004, page 1 of 7
HD74AC195
Pin Names
CP
D
0
to D
3
PE
MR
J,
K
Q
0
to Q
3
,
Q
3
Clock Pulse Input (Active Rising Edge)
Parallel Data Inputs
Parallel Enable Input
Asynchronous Master Reset
J-K or D Type Serial Inputs
Outputs
Timing Diagram
CP
MR
J
K
PE
D
0
D
1
D
2
D
3
Q
0
Q
1
Q
2
Q
3
Clear
Serial Shift
Load
Serial Shift
H
L
H
L
Mode Select-Function Table
Inputs
Operating Modes
Asynchronous Reset
Shift, Set First Stage
Shift, Reset First Stage
Shift, Toggle First Stage
Shift, Retain First Stage
MR
L
H
H
H
H
X
CP
X
H
H
H
H
PE
X
H
L
H
L
J
X
H
L
L
H
K
X
X
X
X
X
D
n
L
H
L
q
0
q
0
Q
0
L
q
0
q
0
q
0
q
0
Q
1
L
q
1
q
1
q
1
q
1
Outputs
Q
2
L
q
2
q
2
q
2
q
2
Q
3
H
q
2
q
2
q
2
q
2
Q
3
Parallel Load
H
L
X
X
d
n
d
0
d
1
d
2
d
3
d
3
H : HIGH Voltage Level
L : LOW Voltage Level
X : Immaterial
Lower case letters indicate the state of the referenced input (or output) one setup time prior to the LOW-to-HIGH
transition.
:
LOW-to-HIGH clock transition.
Rev.2.00, Jul.16.2004, page 3 of 7
HD74AC195
Logic Diagram
K
D
3
D
2
D
1
D
0
V
CC
PE
V
CC
J
CP
MR
Q
3
Q
3
Q
2
Q
1
Q
0
Absolute Maximum Ratings
Item
Supply voltage
DC input diode current
DC input voltage
DC output diode current
DC output voltage
DC output source or sink current
DC V
CC
or ground current per output pin
Storage temperature
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
, I
GND
Tstg
Ratings
–0.5 to 7
–20
20
–0.5 to Vcc+0.5
–50
50
–0.5 to Vcc+0.5
±50
±50
–65 to +150
Unit
V
mA
mA
V
mA
mA
V
mA
mA
°C
Condition
V
I
= –0.5V
V
I
= Vcc+0.5V
V
O
= –0.5V
V
O
= Vcc+0.5V
Recommended Operating Conditions
Item
Supply voltage
Input and output voltage
Operating temperature
Input rise and fall time
(except Schmitt inputs)
V
IN
30% to 70% V
CC
Symbol
V
CC
V
I
, V
O
Ta
tr, tf
2 to 6
0 to V
CC
–40 to +85
8
Ratings
V
V
°C
ns/V
V
CC
= 3.0V
V
CC
= 4.5 V
V
CC
= 5.5 V
Unit
Condition
Rev.2.00, Jul.16.2004, page 4 of 7
HD74AC195
DC Characteristics
Item
Sym-
bol
V
IH
Vcc
(V)
3.0
4.5
5.5
V
IL
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
V
OL
5.5
3.0
4.5
5.5
3.0
4.5
Input leakage
current
Dynamic output
current*
Quiescent supply
current
I
IN
I
OLD
I
OHD
I
CC
5.5
5.5
5.5
5.5
5.5
min.
2.1
3.15
3.85
—
—
—
2.9
4.4
5.4
2.58
3.94
4.94
—
—
—
—
—
—
—
—
—
—
Ta = 25°C
°
typ.
1.5
2.25
2.75
1.50
2.25
2.75
2.99
4.49
5.49
—
—
—
0.002
0.001
0.001
—
—
—
—
—
—
—
max.
—
—
—
0.9
1.35
1.65
—
—
—
—
—
—
0.1
0.1
0.1
0.32
0.32
0.32
±0.1
—
—
8.0
Ta = –40 to
+85°C
°
min.
2.1
3.15
3.85
—
—
—
2.9
4.4
5.4
2.48
3.80
4.80
—
—
—
—
—
—
—
86
–75
—
max.
—
—
—
0.9
1.35
1.65
—
—
—
—
—
—
0.1
0.1
0.1
0.37
0.37
0.37
±1.0
—
—
80
µA
mA
mA
µA
V
V
OUT
= 0.1 V or V
CC
–0.1 V
Unit
Condition
Input Voltage
V
V
OUT
= 0.1 V or V
CC
–0.1 V
Output voltage
V
OH
V
IN
= V
IL
or V
IH
I
OUT
= –50
µA
V
IN
= V
IL
or V
IH
I
OH
= –12 mA
I
OH
= –24 mA
I
OH
= –24 mA
V
IN
= V
IL
or V
IH
I
OUT
= 50
µA
V
IN
= V
IL
or V
IH
I
OL
= 12 mA
I
OL
= 24 mA
I
OL
= 24 mA
V
IN
= V
CC
or GND
V
OLD
= 1.1 V
V
OHD
= 3.85 V
V
IN
= V
CC
or ground
*Maximum
test duration 2.0 ms, one output loaded at a time.
AC Characteristics
Ta = +25°C
C
L
= 50 pF
Min
Typ
Max
75
100
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
—
—
9.0
5.5
9.0
6.5
7.5
5.5
6.0
5.0
—
—
13.0
10.0
13.0
10.0
10.5
8.0
9.0
7.0
Ta = –40°C to +85°C
C
L
= 50 pF
Min
Max
65
85
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
—
—
15.0
11.5
15.0
11.5
12.0
9.5
10.5
8.0
MHz
ns
ns
ns
ns
Item
Maximum clock
frequency
Propagation delay
CP to Q
n
or
Q
3
Propagation delay
CP to Q
n
or
Q
2
Propagation delay
MR
to
Q
2
Propagaion delay
MR
to
Q
n
Note:
Symbol
f
max
t
PLH
t
PHL
t
PLH
t
PHL
V
CC
(V)*
1
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
Unit
1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Rev.2.00, Jul.16.2004, page 5 of 7
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