5962-8959819MZA datasheet, PDF

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5962-8959819MZA: DescriptionStandard SRAM, 128KX8, 35ns, CMOS, CDIP32, 0.400 INCH, CERAMIC, DIP-32; Categorystorage storage; File Size211KB，17 Pages; ManufacturerMicross; Websitehttps://www.micross.com

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5962-8959819MZA Overview

Standard SRAM, 128KX8, 35ns, CMOS, CDIP32, 0.400 INCH, CERAMIC, DIP-32

5962-8959819MZA Parametric

Parameter Name	Attribute value
Parts packaging code	DIP
package instruction	0.400 INCH, CERAMIC, DIP-32
Contacts	32
Reach Compliance Code	compli
ECCN code	3A001.A.2.C
Maximum access time	35 ns
Other features	TTL COMPATIBLE INPUTS/OUTPUTS, 2V DATA RETENTION, BATTERY BACKUP, LOW POWER STANDBY
I/O type	COMMON
JESD-30 code	R-CDIP-T32
JESD-609 code	e0
memory density	1048576 bi
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	128KX8
Output characteristics	3-STATE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP32,.4
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Qualified
Filter level	MIL-STD-883
Maximum seat height	5.8928 mm
Maximum standby current	0.001 A
Minimum standby current	2 V
Maximum slew rate	0.125 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	10.16 mm
Base Number Matches	1

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SRAM

MT5C1008

128K x 8 SRAM

WITH DUAL CHIP ENABLE

AVAILABLE AS MILITARY

SPECIFICATIONS

•SMD 5962-89598

•MIL-STD-883

PIN ASSIGNMENT

(Top View)

32-Pin DIP (C, CW)

32-Pin CSOJ (SOJ)

A16

A14

A12

DQ1

DQ2

DQ3

A15

CE2

WE\

A13

A11

OE\

A10

CE\

DQ8

DQ7

DQ6

DQ5

DQ4

A16

A14

A12

DQ1

DQ2

DQ3

32-Pin LCC (EC)

32-Pin SOJ (DCJ)

A15

CE2

WE\

A13

A11

OE\

A10

CE\

DQ8

DQ7

DQ6

DQ5

DQ4

FEATURES

•

High Speed: 12, 15, 20, 25, 35, 45, 55 and 70 ns

Battery Backup: 2V data retention

Low power standby

High-performance, low-power CMOS process

Single +5V (+10%) Power Supply

Easy memory expansion with CE1\, CE2, and OE\

options.

• All inputs and outputs are TTL compatible

• Micross Components uses die type Cy7C109B from

Cypress -6-T SRAM cell design

32-Pin LCC (ECA)

4 3 2 1 32 31 30

A16

A14

A12

DQ1

DQ2

DQ3

A15

CE2

WE\

A13

A11

OE\

A10

CE\

DQ8

DQ7

DQ6

DQ5

DQ4

OPTIONS

• Timing

12ns access

15ns access

20ns access

25ns access

35ns access

45ns access

55ns access

70ns access

• Package(s)•

Ceramic DIP (400 mil)

Ceramic DIP (600 mil)

Ceramic LCC

Ceramic Flatpack

Ceramic SOJ

• 2V data retention/low power

MARKING

-12 (contact factory)

-15

-20

-25

-35

-45

-55*

-70*

DQ1

A12

A14

A10

A15

CE2

32-Pin Flat Pack (F)

A13

A11

A10

CE1

DQ8

14 15 16 17 18 19 20

GENERAL DESCRIPTION

The MT5C1008 SRAM employs high-speed, low

power CMOS designs using a four-transistor memory cell, and

are fabricated using double-layer metal, double-layer polysili-

con technology.

For design ﬂexibility in high-speed memory appli-

cations, this device offers dual chip enables (CE1\, CE2) and

output enable (OE\). These control pins can place the outputs

in High-Z for additional ﬂexibility in system design. All de-

vices operate from a single +5V power supply and all inputs

and outputs are fully TTL compatible.

Writing to these devices is accomplished when write

enable (WE\) and CE1\ inputs are both LOW and CE2 is HIGH.

Reading is accomplished when WE\ and CE2 remain HIGH

and CE1\ and OE\ go LOW. The devices offer a reduced

power standby mode when disabled, allowing system designs

to achieve low standby power requirements.

The “L” version offers a 2V data retention mode,

reducing current consumption to 1mA maximum.

ECA

DCJ

SOJ

No. 111

No. 112

No. 207

No. 208

No. 303

No. 501

No. 507

*Electrical characteristics identical to those provided for the 45ns

access devices.

For more products and information

please visit our web site at

www.micross.com

MT5C1008

Rev. 6.8 01/10

Micross Components reserves the right to change products or speciﬁcations without notice.

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

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