INTEGRATED CIRCUITS
74LV00
Quad 2-input NAND gate
Product specification
Supersedes data of 1998 Apr 13
IC24 Data Handbook
1998 Apr 20
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV00
FEATURES
•
Wide operating voltage: 1.0 to 5.5 V
•
Optimized for low voltage applications: 1.0 to 3.6 V
•
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
•
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
•
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
•
Output capability: standard
•
I
CC
category: SSI
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25°C; t
r
=t
f
≤
2.5 ns
SYMBOL
t
PHL
/t
PLH
C
I
C
PD
PARAMETER
Propagation delay
nA, nB to nY
Input capacitance
Power dissipation capacitance per gate
T
amb
= 25°C
T
amb
= 25°C
DESCRIPTION
The 74LV00 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT00.
The 74LV00 provides the 2-input NAND function.
CONDITIONS
C
L
= 15 pF;
V
CC
= 3.3 V
See Notes 1 and 2
TYPICAL
7
3.5
22
UNIT
ns
pF
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW)
P
D
= C
PD
V
CC2
f
i
)
(C
L
V
CC2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
V
CC2
f
o
) = sum of the outputs.
(C
L
2. The condition is V
I
= GND to V
CC.
ORDERING INFORMATION
PACKAGES
14-Pin Plastic DIL
14-Pin Plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
OUTSIDE NORTH AMERICA
74LV00 N
74LV00 D
74LV00 DB
74LV00 PW
NORTH AMERICA
74LV00 N
74LV00 D
74LV00 DB
74LV00PW DH
PKG. DWG. #
SOT27-1
SOT108-1
SOT337-1
SOT402-1
PIN DESCRIPTION
PIN
NUMBER
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
SYMBOL
1A – 4A
1B – 4B
1Y – 4Y
GND
V
CC
Data inputs
Data inputs
Data outputs
Ground (0 V)
Positive supply voltage
FUNCTION
FUNCTION TABLE
INPUTS
nA
L
L
H
H
NOTES:
H = HIGH voltage level
L = LOW voltage level
nB
L
H
L
H
OUTPUTS
nY
H
H
H
L
1998 Apr 20
2
853–1898 19257
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV00
PIN CONFIGURATION
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
4B
4A
4Y
3B
3A
3Y
LOGIC SYMBOL
1
2
4
5
9
10
12
13
1A
1B
2A
2B
3A
3B
4A
4B
1Y
3
2Y
6
3Y
8
4Y
11
SY00035
SY00034
LOGIC SYMBOL (IEEE/IEC)
1
2
4
5
9
10
12
13
&
3
&
LOGIC DIAGRAM (ONE GATE)
A
Y
6
B
&
SV00379
8
&
11
SV00378
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
I
V
O
T
amb
Input voltage
Output voltage
Operating ambient temperature range in free air
See DC and AC
characteristics
V
CC
= 1.0V to 2.0V
V
CC
= 2.0V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V to 5.5V
PARAMETER
DC supply voltage
CONDITIONS
See Note 1
MIN
1.0
0
0
–40
–40
–
–
–
–
–
–
–
–
TYP.
3.3
–
–
MAX
5.5
V
CC
V
CC
+85
+125
500
200
100
50
UNIT
V
V
V
°C
t
r
, t
f
Input rise and fall times
ns/V
NOTE:
1. The LV is guaranteed to function down to V
CC
= 1.0V (input levels GND or V
CC
); DC characteristics are guaranteed from V
CC
= 1.2V to V
CC
= 5.5V.
1998 Apr 20
3
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV00
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
V
CC
±I
IK
±I
OK
±I
O
±I
GND
,
±I
CC
T
stg
P
TOT
PARAMETER
DC supply voltage
DC input diode current
DC output diode current
DC output source or sink current
– standard outputs
DC V
CC
or GND current for types with
– standard outputs
Storage temperature range
Power dissipation per package
– plastic DIL
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
V
I
< –0.5 or V
I
> V
CC
+ 0.5V
V
O
< –0.5 or V
O
> V
CC
+ 0.5V
–0.5V < V
O
< V
CC
+ 0.5V
CONDITIONS
RATING
–0.5 to +7.0
20
50
25
50
–65 to +150
750
500
400
UNIT
V
mA
mA
mA
mA
°C
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
V
CC
= 1.2V
V
IH
HIGH level Input
voltage
V
CC
= 2.0V
V
CC
= 2.7 to 3.6V
V
CC
= 4.5 to 5.5V
V
CC
= 1.2V
V
IL
LOW level Input
voltage
V
CC
= 2.0V
V
CC
= 2.7 to 3.6V
V
CC
= 4.5 to 5.5
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
–I
O
= 100µA
V
OH
HIGH level output
voltage all outputs
voltage;
out uts
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
–I
O
= 100µA
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
–I
O
= 100µA
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
–I
O
= 100µA
V
CC
= 4.5V; V
I
= V
IH
or V
IL;
–I
O
= 100µA
V
OH
HIGH level output
voltage;
g
STANDARD
outputs
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
–I
O
= 6mA
V
CC
= 4.5V; V
I
= V
IH
or V
IL;
–I
O
= 12mA
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100µA
V
OL
LOW level output
voltage; all outputs
voltage
out uts
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100µA
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100µA
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 100µA
V
CC
= 4.5V; V
I
= V
IH
or V
IL;
I
O
= 100µA
V
OL
LOW level output
voltage;
g
STANDARD
outputs
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 6mA
V
CC
= 4.5V; V
I
= V
IH
or V
IL;
I
O
= 12mA
1.8
2.5
2.8
4.3
2.40
3.60
1.2
2.0
2.7
3.0
4.5
2.82
4.20
0
0
0
0
0
0.25
0.35
0.2
0.2
0.2
0.2
0.40
0.55
0.2
0.2
0.2
0.2
0.50
V
0.65
V
1.8
2.5
2.8
4.3
2.20
V
3.50
V
0.9
1.4
2.0
0.7*V
CC
0.3
0.6
0.8
0.3*V
CC
-40°C to +85°C
TYP
1
MAX
-40°C to +125°C
MIN
0.9
1.4
2.0
0.7*V
CC
0.3
0.6
0.8
0.3*V
CC
V
V
MAX
UNIT
1998 Apr 20
4
Philips Semiconductors
Product specification
Quad 2-input NAND gate
74LV00
DC ELECTRICAL CHARACTERISTICS (Continued)
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
Input leakage
current
Quiescent supply
current; SSI
Additional
quiescent supply
current
TEST CONDITIONS
MIN
I
I
I
CC
∆I
CC
V
CC
= 5.5V; V
I
= V
CC
or GND
V
CC
= 5.5V; V
I
= V
CC
or GND; I
O
= 0
V
CC
= 2.7V to 3.6V; V
I
= V
CC
–0.6V
-40°C to +85°C
TYP
1
MAX
1.0
20.0
500
-40°C to +125°C
MIN
MAX
1.0
40
850
µA
µA
µA
UNIT
NOTE:
1. All typical values are measured at T
amb
= 25°C.
AC CHARACTERISTICS
GND = 0V; t
r
= t
f
≤
2.5ns; C
L
= 50pF; R
L
= 1KΩ
SYMBOL
PARAMETER
WAVEFORM
CONDITION
V
CC
(V)
1.2
2.0
t
PHL/PLH
Propagation delay
nA, nB to nY
Figures 1, 2
2.7
3.0 to 3.6
4.5 to 5.5
NOTES:
1. Unless otherwise stated, all typical values are measured at T
amb
= 25°C.
2. Typical values are measured at V
CC
= 3.3 V.
3. Typical values are measured at V
CC
= 5.0 V.
MIN
LIMITS
–40 to +85
°C
TYP
1
45
15
11
9
2
6.5
3
26
18
15
11
31
23
18
14
ns
MAX
–40 to +125
°C
MIN
MAX
UNIT
AC WAVEFORMS
V
M
= 1.5 V at V
CC
≥
2.7 V and
≤
3.6 V;
V
M
= 0.5
×
V
CC
at V
CC
<
2.7 V and
≥
4.5 V;
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
nA, nB INPUT
GND
t
PHL
V
OH
nY OUTPUT
V
M
t
PLH
V
M
TEST CIRCUIT
V
cc
V
l
PULSE
GENERATOR
R
T
D.U.T.
V
O
50pF
C
L
R
L
= 1k
Test Circuit for Outputs
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitiance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
V
OL
SV00377
TEST
t
PLH/
t
PHL
V
CC
< 2.7V
2.7–3.6V
≥
4.5 V
V
I
V
CC
2.7V
V
CC
Figure 1. Input (nA, nB) to output (nY) propagation delays.
SV00902
Figure 2. Load circuitry for switching times.
1998 Apr 20
5
Microcontroller MCU
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