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5962-8866208NA

Description
Standard SRAM, 32KX8, 15ns, CMOS, CDIP28, 0.300 INCH, CERDIP-28
Categorystorage    storage   
File Size238KB,13 Pages
ManufacturerCypress Semiconductor
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5962-8866208NA Overview

Standard SRAM, 32KX8, 15ns, CMOS, CDIP28, 0.300 INCH, CERDIP-28

5962-8866208NA Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeDIP
package instruction0.300 INCH, CERDIP-28
Contacts28
Reach Compliance Code_compli
ECCN code3A001.A.2.C
Maximum access time15 ns
Other featuresAUTOMATIC POWER-DOWN
I/O typeCOMMON
JESD-30 codeR-GDIP-T28
JESD-609 codee0
length37.0205 mm
memory density262144 bi
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of ports1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize32KX8
Output characteristics3-STATE
ExportableYES
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP28,.3
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Filter level38535Q/M;38534H;883B
Maximum seat height5.08 mm
Maximum standby current0.02 A
Minimum standby current4.5 V
Maximum slew rate0.18 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb) - hot dipped
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
Base Number Matches1
fax id: 1030
CY7C199
32K x 8 Static RAM
Features
• High speed
— 10 ns
• Fast t
DOE
• CMOS for optimum speed/power
• Low active power
— 467 mW (max, 12 ns “L” version)
• Low standby power
— 0.275 mW (max, “L” version)
• 2V data retention (“L” version only)
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
provided by an active LOW chip enable (CE) and active LOW
output enable (OE) and three-state drivers. This device has an
automatic power-down feature, reducing the power consump-
tion by 81% when deselected. The CY7C199 is in the standard
300-mil-wide DIP, SOJ, and LCC packages.
An active LOW write enable signal (WE) controls the writ-
ing/reading operation of the memory. When CE and WE inputs
are both LOW, data on the eight data input/output pins (I/O
0
through I/O
7
) is written into the memory location addressed by
the address present on the address pins (A
0
through A
14
).
Reading the device is accomplished by selecting the device
and enabling the outputs, CE and OE active LOW, while WE
remains inactive or HIGH. Under these conditions, the con-
tents of the location addressed by the information on address
pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH. A die coat is used to improve alpha immunity.
Functional Description
The CY7C199 is a high-performance CMOS static RAM orga-
nized as 32,768 words by 8 bits. Easy memory expansion is
Logic Block Diagram
Pin Configurations
DIP / SOJ / SOIC
Top View
A
5
A
6
A
7
A
8
A
9
A
10
A
11
A
12
A
13
A
14
I/O
0
I/O
1
I/O
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
22
23
24
25
26
27
28
1
2
3
4
5
6
7
LCC
Top View
A7
A6
A5
VCC
WE
A
8
A
9
A
10
A
11
A
12
A
13
A
14
I/O
0
I/O
1
C199–2
I/O2
GND
I/O3
I/O4
I/O5
3 2 1 28 27
4
26 A
4
5
25 A
3
6
24 A
2
7
23 A
1
8
22 OE
9
21 A
0
10
20 CE
11
19 I/O
7
12
18 I/O
6
1314151617
C199–3
I/O
0
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
CE
WE
OE
I/O
1
ROW DECODER
I/O
2
SENSE AMPS
1024 x 32 x 8
ARRAY
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
A
4
A
3
A
2
A
1
OE
A
0
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
I/O
3
I/O
4
I/O
5
OE
A
1
A
2
A
3
A
4
WE
V
CC
A
5
A
6
A
7
A
8
A
9
A
10
A
11
COLUMN
DECODER
POWER
DOWN
I/O
6
I/O
7
TSOP I
Top View
(not to scale)
A
10
A
11
A
12
A
13
A
14
C199–1
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A
0
CE
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
GND
I/O
2
I/O
1
I/O
0
A
14
A
13
A
12
C199–4
Selection Guide
7C199-8
Maximum Access Time (ns)
Maximum Operating
Current (mA)
L
Maximum CMOS
Standby Current (mA)
L
8
120
0.5
7C199-10
10
110
90
0.5
0.05
7C199-12
12
160
90
10
0.05
7C199-15
15
155
90
10
0.05
7C199-20
20
150
90
10
0.05
7C199-25
25
150
80
10
0.05
7C199-35
35
140
70
10
0.05
7C199-45
45
140
10
Shaded area contains preliminary information.
Cypress Semiconductor Corporation
3901 North First Street
San Jose
• CA 95134 •
408-943-2600
February 1988 – Revised April 22, 1998

5962-8866208NA Related Products

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Description Standard SRAM, 32KX8, 15ns, CMOS, CDIP28, 0.300 INCH, CERDIP-28 Standard SRAM, 32KX8, 45ns, CMOS, CDIP28, 0.300 INCH, CERDIP-28 Standard SRAM, 32KX8, 25ns, CMOS, CDIP28, 0.300 INCH, CERDIP-28 Standard SRAM, 32KX8, 35ns, CMOS, CQCC28, CERAMIC, LCC-28 Standard SRAM, 32KX8, 35ns, CMOS, CDIP28, 0.300 INCH, CERDIP-28 Standard SRAM, 32KX8, 25ns, CMOS, CQCC28, CERAMIC, LCC-28 Standard SRAM, 32KX8, 45ns, CMOS, CQCC28, CERAMIC, LCC-28 Standard SRAM, 32KX8, 20ns, CMOS, CQCC28, CERAMIC, LCC-28
Is it lead-free? Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Parts packaging code DIP DIP DIP QLCC DIP QLCC QLCC QLCC
package instruction 0.300 INCH, CERDIP-28 0.300 INCH, CERDIP-28 0.300 INCH, CERDIP-28 CERAMIC, LCC-28 0.300 INCH, CERDIP-28 CERAMIC, LCC-28 CERAMIC, LCC-28 CERAMIC, LCC-28
Contacts 28 28 28 28 28 28 28 28
Reach Compliance Code _compli not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant
ECCN code 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C 3A001.A.2.C
Maximum access time 15 ns 45 ns 25 ns 35 ns 35 ns 25 ns 45 ns 20 ns
Other features AUTOMATIC POWER-DOWN AUTOMATIC POWER-DOWN AUTOMATIC POWER-DOWN AUTOMATIC POWER-DOWN AUTOMATIC POWER-DOWN AUTOMATIC POWER-DOWN AUTOMATIC POWER-DOWN AUTOMATIC POWER-DOWN
I/O type COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 code R-GDIP-T28 R-GDIP-T28 R-GDIP-T28 R-CQCC-N28 R-GDIP-T28 R-CQCC-N28 R-CQCC-N28 R-CQCC-N28
JESD-609 code e0 e0 e0 e0 e0 e0 e0 e0
length 37.0205 mm 37.0205 mm 37.0205 mm 13.97 mm 37.0205 mm 13.97 mm 13.97 mm 13.97 mm
memory density 262144 bi 262144 bit 262144 bit 262144 bit 262144 bit 262144 bit 262144 bit 262144 bit
Memory IC Type STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 8 8 8 8 8 8 8 8
Number of functions 1 1 1 1 1 1 1 1
Number of ports 1 1 1 1 1 1 1 1
Number of terminals 28 28 28 28 28 28 28 28
word count 32768 words 32768 words 32768 words 32768 words 32768 words 32768 words 32768 words 32768 words
character code 32000 32000 32000 32000 32000 32000 32000 32000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C
organize 32KX8 32KX8 32KX8 32KX8 32KX8 32KX8 32KX8 32KX8
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Exportable YES YES YES YES YES YES YES YES
Package body material CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DIP DIP DIP QCCN DIP QCCN QCCN QCCN
Encapsulate equivalent code DIP28,.3 DIP28,.3 DIP28,.3 LCC28,.35X.55 DIP28,.3 LCC28,.35X.55 LCC28,.35X.55 LCC28,.35X.55
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE IN-LINE CHIP CARRIER IN-LINE CHIP CARRIER CHIP CARRIER CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 240 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 240
power supply 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Filter level 38535Q/M;38534H;883B 38535Q/M;38534H;883B 38535Q/M;38534H;883B 38535Q/M;38534H;883B 38535Q/M;38534H;883B 38535Q/M;38534H;883B 38535Q/M;38534H;883B 38535Q/M;38534H;883B
Maximum seat height 5.08 mm 5.08 mm 5.08 mm 1.905 mm 5.08 mm 1.905 mm 1.905 mm 1.905 mm
Maximum standby current 0.02 A 0.02 A 0.02 A 0.02 A 0.02 A 0.02 A 0.02 A 0.02 A
Minimum standby current 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Maximum slew rate 0.18 mA 0.15 mA 0.16 mA 0.15 mA 0.15 mA 0.16 mA 0.15 mA 0.17 mA
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount NO NO NO YES NO YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY
Terminal surface Tin/Lead (Sn/Pb) - hot dipped Tin/Lead (Sn/Pb) - hot dipped Tin/Lead (Sn/Pb) - hot dipped Tin/Lead (Sn/Pb) - hot dipped Tin/Lead (Sn/Pb) - hot dipped Tin/Lead (Sn/Pb) - hot dipped Tin/Lead (Sn/Pb) - hot dipped Tin/Lead (Sn/Pb) - hot dipped
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE NO LEAD THROUGH-HOLE NO LEAD NO LEAD NO LEAD
Terminal pitch 2.54 mm 2.54 mm 2.54 mm 1.27 mm 2.54 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL QUAD DUAL QUAD QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 30 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 30
width 7.62 mm 7.62 mm 7.62 mm 8.89 mm 7.62 mm 8.89 mm 8.89 mm 8.89 mm
Base Number Matches 1 1 1 1 1 1 1 1
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