3823 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
REJ03B0146-0202
Rev.2.02
Jun.19.2007
●LCD
drive control circuit
Bias ................................................................................... 1/2, 1/3
Duty ........................................................................... 1/2, 1/3, 1/4
Common output .......................................................................... 4
Segment output ........................................................................ 32
●Main
clock generating circuits .............. Built-in feedback resistor
(connect to external ceramic resonator or quartz-crystal oscillator)
●Sub-clock
generating circuits
(connect to external quartz-crystal oscillator or on-chip oscillator)
●Power
source voltage
In frequency/2 mode (f(X
IN
)
≤
10 MHz) ................... 4.5 to 5.5 V
In frequency/2 mode (f(X
IN
)
≤
8 MHz) ..................... 4.0 to 5.5 V
In frequency/4 mode (f(X
IN
)
≤
10 MHz) ................... 2.5 to 5.5 V
In frequency/4 mode (f(X
IN
)
≤
8 MHz) ..................... 2.0 to 5.5 V
In frequency/4 mode (f(X
IN
)
≤
5 MHz) ..................... 1.8 to 5.5 V
In frequency/8 mode (f(X
IN
)
≤
10 MHz) ................... 2.5 to 5.5 V
In frequency/8 mode (f(X
IN
)
≤
8 MHz) ..................... 2.0 to 5.5 V
In frequency/8 mode (f(X
IN
)
≤
5 MHz) ..................... 1.8 to 5.5 V
In low-speed mode .................................................... 1.8 to 5.5 V
●Power
dissipation
In frequency/2 mode ............................................... 18 mW (std.)
(at f(X
IN
) = 8 MHz, Vcc = 5 V, Ta = 25 °C)
In low-speed mode at X
CIN ................................................
18
µW
(std.)
(at f(X
IN
) stopped, f(X
CIN
) = 32 kHz, Vcc = 2.5 V, Ta = 25 °C)
In low-speed mode at on-chip oscillator .................. 35
µW
(std.)
(at f(X
IN
) stopped, f(X
CIN
) = stopped, Vcc = 2.5 V, Ta = 25 °C)
●Operating
temperature range .................................. – 20 to 85 °C
DESCRIPTION
The 3823 group is the 8-bit microcomputer based on the 740 fam-
ily core technology.
The 3823 group has the LCD drive control circuit, an 8-channel A/
D converter, a serial interface, a watchdog timer, a ROM correc-
tion function, and as additional functions.
The various microcomputers in the 3823 group include variations
of internal memory size and packaging. For details, refer to the
section on part numbering.
FEATURES
●Basic
machine-language instructions ...................................... 71
●The
minimum instruction execution time ........................... 0.4 µs
(at f(X
IN
) = 10 MHz, High-speed mode)
●Memory
size
ROM ............................................................... 16 K to 60 K bytes
RAM ................................................................. 640 to 2560 bytes
●ROM
correction function .............................. 32 bytes
✕
2 blocks
●Watchdog
timer .............................................................. 8-bit
✕
1
●Programmable
input/output ports ............................................ 49
●Input
ports .................................................................................. 5
●Software
pull-up/pull-down resistors (Ports P0-P7 except port P4
0
)
●Interrupts
................................................. 17 sources, 16 vectors
(includes key input interrupt)
●Key
Input Interrupt (Key-on Wake-Up) ...................................... 8
●Timers
........................................................... 8-bit
✕
3, 16-bit
✕
2
●Serial
interface ............ 8-bit
✕
1 (UART or Clock-synchronized)
●A/D
converter ............ 10-bit
✕
8 channels or 8-bit
✕
8 channels
APPLICATIONS
Camera, audio equipment, household appliances, consumer elec-
tronics, etc.
Rev.2.02 Jun 19, 2007
REJ03B0146-0202
page 1 of 73
3823 Group
Table 1 Performance overview
Parameter
Number of basic instructions
Instruction execution time
Oscillation frequency
Memory sizes
ROM
RAM
Input port
P3
4
-P3
7
, P4
0
71
0.4
µs
(Minimum instruction, f(X
IN
) 10 MHz, High-speed mode)
10 MHz (Maximum)
16 K to 60 K bytes
640 to 2560 bytes
4-bit
✕
1, 1-bit
✕
1
(4 pins sharing SEG)
I/O port
P0-P2, P4
1
-P4
7
, P5, P6, P7
0
, P7
1
8-bit
✕
5, 7-bit
✕
1, 2 bit
✕
1
(16 pins sharing SEG)
Interrupt
Timer
Serial interface
A/D converter
Watchdog timer
ROM correction function
LCD drive control
circuit
Bias
Duty
Common output
Segment output
Main clock generating circuits
Sub-clock generating circuits
Power source voltage
In frequency/2 mode (f(X
IN
)
≤
10MHz)
In frequency/2 mode (f(X
IN
)
≤
8MHz)
In frequency/4 mode (f(X
IN
)
≤
10MHz)
In frequency/4 mode (f(X
IN
)
≤
8MHz)
In frequency/4 mode (f(X
IN
)
≤
5MHz)
In frequency/8 mode (f(X
IN
)
≤
10MHz)
In frequency/8 mode (f(X
IN
)
≤
8MHz)
In frequency/8 mode (f(X
IN
)
≤
5MHz)
In low-speed mode
Power dissipation
In frequency/2 mode
In low-speed mode at X
CIN
In low-speed mode at on-chip oscillator
Input/Output
characteristics
Input/Output withstand voltage
Output current
17 sources, 16 vectors (includes key input interrupt)
8-bit
✕
3, 16-bit
✕
2
8-bit
✕
1 (UART or Clock-synchronized)
10-bit
✕
8 channels or 8 bit
✕
8 channels
8-bit
✕
1
32 bytes
✕
2 blocks
1/2, 1/3
2, 3, 4
4
32
Built-in feedback resistor
(connect to external ceramic rasonator or quartz-crystal oscillator)
Built-in feedback resistor
(connect to external quartz-crystal oscillator or on-chip oscillator)
4.5 to 5.5V
4.0 to 5.5V
2.5 to 5.5V
2.0 to 5.5V
1.8 to 5.5V
2.5 to 5.5V
2.0 to 5.5V
1.8 to 5.5V
1.8 to 5.5V
Std. 18 mW (Vcc = 5V, f(X
IN
) = 8MHz, Ta = 25 °C)
Std. 18
µW
(Vcc = 2.5V, f(X
IN
) = stopped, f(X
CIN
) = 32kHz, Ta = 25 °C)
Std. 35
µW
(Vcc = 2.5V, f(X
IN
) = stopped, f(X
CIN
) = stopped, Ta = 25 °C)
V
CC
10mA
-20 to 85 °C
CMOS sillicon gate
80-pin plastic molded LQFP/QFP
Function
Operating temperature range
Device structure
Package
Rev.2.02 Jun 19, 2007
REJ03B0146-0202
page 3 of 73
3823 Group
PIN DESCRIPTION
Table 2 Pin description (1)
Pin
V
CC
, V
SS
V
REF
AV
SS
Name
Power source
Analog refer-
ence voltage
Analog power
source
Reset input
Clock input
Clock output
Function
Function except a port function
•Apply voltage of power source to V
CC
, and 0 V to V
SS
. (For the limits of V
CC
, refer to “Recom-
mended operating conditions”).
•Reference voltage input pin for A/D converter.
•GND input pin for A/D converter.
•Connect to V
SS
.
•Reset input pin for active “L”.
•Input and output pins for the main clock generating circuit.
•Feedback resistor is built in between X
IN
pin and X
OUT
pin.
•Connect a ceramic resonator or a quartz-crystal oscillator between the X
IN
and X
OUT
pins to set
the oscillation frequency.
•If an external clock is used, connect the clock source to the X
IN
pin and leave the X
OUT
pin open.
•This clock is used as the oscillating source of system clock.
RESET
X
IN
X
OUT
V
L1
–V
L3
COM
0
–COM
3
LCD power
source
Common output
•Input 0
≤
V
L1
≤
V
L2
≤
V
L3
voltage.
•Input 0 – V
L3
voltage to LCD.
•LCD common output pins.
•COM
2
and COM
3
are not used at 1/2 duty ratio.
•COM
3
is not used at 1/3 duty ratio.
SEG
0
–SEG
11
P0
0
/SEG
16
–
P0
7
/SEG
23
Segment output
I/O port P0
•LCD segment output pins.
•8-bit I/O port.
•CMOS compatible input level.
•CMOS 3-state output structure.
•LCD segment output pins
P1
0
/SEG
24
–
P1
7
/SEG
31
P2
0
/KW
0
–
P2
7
/KW
7
I/O port P1
•I/O direction register allows each port to be individually
programmed as either input or output.
•Pull-down control is enabled.
•8-bit I/O port.
•CMOS compatible input level.
•CMOS 3-state output structure.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•Pull-up control is enabled.
•Key input (key-on wake-up) interrupt
input pins
I/O port P2
P3
4
/SEG
12
–
P3
7
/SEG
15
Input port P3
•4-bit input port.
•CMOS compatible input level.
•Pull-down control is enabled.
•LCD segment output pins
Rev.2.02 Jun 19, 2007
REJ03B0146-0202
page 5 of 73
Power technology
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