T
PJ3844B / PJ3845B
High Performance Current Mode Controller
he PJ3844B , PJ3845 series are high performance fixed
frequency current mode controllers. This is specifically
cycle-by-cycle current limiting , programmable output
deadtime, and a latch for single pulse metering. Allowing
output deadtimes to be programmed from 50% to 70%.
This device is available in 8-pin dual-in-line plastic
packages as well as the 8-pin plastic surface mount (SOP-8).
The SOP-8 package has separate power and ground pins for
the totem pole output stage.
The PJ3844B is tailored for lower voltage applications
having UVLO thresholds of 16V (on) 10V (off). ThePJ3845B
is tailored for lower voltage applications having UVLO
thresholds of 8.5V(on) and 7.6V(off).
designed for Off-Line and DC-to-DC converter applications
offering the designer a cost effective solution with minimal
external components.This integrated circuits feature a
trimmed oscillator for precise duty cycle control, a
temperature compensated reference, high gain error amplifier,
current sensing comparator,and a high current totem pole
output ideally suited for driving a power MOSFET.
Also included are protective features consisting of input
and reference undervoltage lockouts each with hysteresis,
FEATURES
Trimmed Oscillator Discharge Current for Precise Duty
Cycle Control
Current Mode Operation to 500KHz
Automatic Feed Forward Compensation
Latching PWM for Cycle-By-Cycle Current Limiting
Internally Trimmed Reference with Undervoltage Lockout
High Current Totem Pole Output
Input Undervoltage Lockout with Hystersis
Low Start-Up and Operating Current
Pin：1. Compensation
Pin：2.
Voltage Feedback
Pin：3.
Current Sense
Pin：4.
R
T
/C
T
DIP-8
SOP-8
5
. Gnd
6. Output
7. Vcc
8. Vref
ORDERING INFORMATION
Device
PJ3844/3845BCD
PJ3844/3845BCS
Operating Temperature
(Ambient)
-20℃ TO +85
0
C
Package
DIP-8
SOP-8
SIMPLIFIED BLOCK DIAGRAM
Pin numbers adjacent to terminals are for the 8-pin dual-in-line package. Pin numbers in parenthesis are for the SOP-8 package
The document contains information on a new product.Specifications and information herein are subject to change without notice.
1-14
2004/11. Rev B
PJ3844B / PJ3845B
High Performance Current Mode Controller
MAXIMUM RATING
Parameter
Supply Voltage (low impedance source)
Supply Voltage (Ii<30mA)
Output Current
Output Energy (capacitive load )
Analog Inputs (pins 2,3 )
Error Amplifier Output Sink Current
Storage Temperature Range
Tstg
Symbol
Vi
Vi
IO
EO
Value
30
Self Limiting
±1
5
-0.3 to 6.3
10
-65 to +150
A
V
mJ
mA
℃
Unit
V
*
All voltages are with respect to pin 5,all currents are positive into the specified terminal.
ELECTRICAL CHARACTERISTICS
(V
CC
= 15V (Note 2), R
T
=10K, C
T
=3.3nF, T
A
=T
low
to T
high
(Note 3) unless otherwise noted)
(
U
nless
otherwise stated , these specifications apply for 0<Tamb<70℃；
V
i
= 15V (Note 5), R
T
=10K, C
T
=3.3nF
)
Parameter
Symbol
V
REF
△V
REF
△V
REF
△V
REF
/△T
Line,Load, Temperature(2)
10Hz<f<10kHz
T
J
=25
℃
(2)
Tamb=125℃, 1000Hrs(2)
Test Conditions
Io=1mA,T
J
= 25℃
12V<Vi<25V
1<Io<20mA
PJ3844B / PJ3845B
Min
Typ
Max
4.90
-
-
-
4.82
-
-
-30
T
J
=25℃
12<Vi<25V
T
MIN
<Tamb<T
MAX
(2)
V
4
V
2
I
B
A
VOL
B
SVR
I
sink
I
Source
V
OH
V
OL
VPIN1=2.5V
2<Vo<4V
47
-
-
-
2.42
-
65
0.7
60
2.0
-0.5
4.55
-
5.00
6
6
0.2
-
50
5
-100
52
0.5
5
1.7
2.50
-0.3
90
1.0
70
6
-0.8
4.85
0.7
5.10
20
25
0.4
5.18
-
25
-180
57
3
-
-
2.58
-2.0
-
-
-
-
-
-
1.1
Unit
V
mV
mV
mV/℃
V
mV
mV
mA
KHz
%
%
V
V
mΑ
dB
MHz
dB
V
V
V
REFERENCE SECTION
Output Voltage
Line Regulation
Load Regulation
Temperature Stability (Note2)
Total Output Variantion
Output Noise Voltage
Long Term Stability
Output Short Circuit
OSCILLATOR SECTION
Initial Accuracy
Voltage Stability
Temperature Stability
Amplitude VPIN4 Peak to Peak
ERROR AMPLIFIER SECTION
Input Voltage (Vo=2.5V)
Input Bias Current
Unity Gain Bandwidth (2)
Supply Voltage Rejection
Output Current
Sink
Source
Output Voltage Swing
High State
Output Voltage Swing
Low State
Vn
Isc
fs
V
PIN2
=2.7V, V
PIN1
=1.1V
V
PIN2
=2.3V, V
PIN1
=5V
V
PIN2
=2.3V,
R
L
=15KΩ to Ground
V
PIN2
=2.7V,
R
L
=15KΩ to Pin8
2-14
2004/11. Rev B
PJ3844B / PJ3845B
High Performance Current Mode Controller
Parameter
CURRENT SENSE SECTION
Current Sense Input Voltage
Gain (Note 3 &4 )
Maximum Input Signal
Supply VoltageRejection
Input Bias Current
Delay to Output
OUTPUT SECTION
Output Voltage
Low State
High State
Output Voltage Rise Time
Symbol
Gv
V
3
SVR
I
B
T
d
V
PIN1
=5V(Note 3 )
12<Vi<25V(Note 3 )
Test Conditions
PJ3844B / PJ3845B
Min
Typ
Max
2.8
0.9
-
-
-
3.0
1.0
70
-2.0
150
3.2
1.1
-
-10
300
Unit
V/V
V
dB
mΑ
ns
V
OL
V
OH
tr
Isink=20mA
Isink=200mA
Isource=20mA Isource=200mA
T
J
=25
℃
, C
L
=1.0nF (Note2 )
T
J
=25
℃
, C
L
=1.0nF (Note2 )
-
-
13
12
-
-
0.1
1.5
13.5
13.5
50
50
0.4
2.2
-
-
150
150
ns
ns
V
Output Voltage Fall Time
tf
UNDER-VOLTAGE LOCKOUT SECTION
Start-Up Threshold
PJ3844B
PJ3845B
Minimum Operating Voltage
After Turn-On
PJ3844B
PJ3845B
PWM SECTION
Max. Duty Cycle
TOTAL STANDBY CURRENT
Start-Up Current
Operating Supply Current
Zener Voltage
Note:
DCmax
I
st
Ii
Viz
Vth
14.5
7.8
16
8.4
17.5
9.0
V
V
CC(min)
8.5
7.0
44
-
V
PIN2
=V
PIN3
=0V
Ii=25mA
-
30
10
7.6
48
0.1
11
34
11.5
8.2
50
0.5
20
-
V
%
mA
mA
V
1. Toggle flip flop used only in PJ3844 and PJ3845.
2. These parameters, although guaranteed, are not 100% tested in production.
3. Parameter measured at trip point of latch with V
PIN2
=0
4. Gain defined as : A =
∆V
PIN1
；0≦V
PIN3
≦0.8V.
∆V
PIN3
5. Adjust Vi above the start threshold before setting at 15V.
3-14
2004/11. Rev B
PJ3844B / PJ3845B
High Performance Current Mode Controller
FIGURE 1-TIMING RESISTOR versus OSCILLATOR
FREQUENCY
FIGURE 2-OUTPUT DEAD TIME versus
OSCILLATOR FREQUENCY
FIGURE 3-ERROR AMP SMALL SINGAL TRANSIENT
RESPONSE
FIGURE 4-ERROR AMP LARGE RESPONSE
TRANSIENT RESPONSE
FIGURE 5-ERROR AMP OPEN-LOOP GAIN AND
PHASE versus FREQUENCY
FIGURE 6-CURRENT SENSE INPUT THRESHOLD
versus ERROR AMP OUTPUT VOLTAGE
4-14
2004/11. Rev B
PJ3844B / PJ3845B
High Performance Current Mode Controller
FIGURE 7-REFERENCE VOLTAGE CHANGE versus
SOURCE CURRENT
FIGURE 8-REFERENCE SHORT CIRCUIT CURRENT
versus TEMPERATURE
FIGURE 9-REFERENCE LOAD REGULATION
FIGURE 10-REFERENCE LINE REGULATION
FIGURE 11- OUTPUT SATURATION VOLTAGE versus
LOAD CURRENT
FIGURE 12-OUTPUT WAVEFORM
5-14
2004/11. Rev B
京公网安备 11010802033920号
EEWORLD
