KSD568/569
KSD568/569
Low Frequency Power Amplifier
• Low Speed Switching Industrial Use
• Complement to KSB707/708
1
TO-220
2.Collector
3.Emitter
1.Base
NPN Epitaxial Silicon Transistor
Absolute Maximum Ratings
T
C
=25°C unless otherwise noted
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CP
I
B
P
C
P
C
T
J
T
STG
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Collector Current (DC)
*Collector Current (Pulse)
Base Current
Collector Dissipation (T
C
=25°C)
Collector Dissipation (T
a
=25°C)
Junction Temperature
Storage Temperature
: KSD568
: KSD569
Parameter
Value
100
60
80
7
7
15
3.5
40
1.5
150
- 55 ~ 150
Units
V
V
V
V
A
A
A
W
W
°C
°C
* PW≤300µs, Duty Cycle≤10%
Electrical Characteristics
T
C
=25°C unless otherwise noted
Symbol
I
CBO
I
EBO
h
FE1
h
FE2
V
CE
(sat)
V
BE
(sat)
Parameter
Collector Cut-off Current
Emitter Cut-off Current
*DC Current Gain
*Collector-Emitter Saturation Voltage
*Base-Emitter Saturation Voltage
Test Condition
V
CB
= 80V, I
E
= 0
V
EB
= 5V, I
C
= 0
V
CE
= 1V, I
C
= 3A
V
CE
= 1V, I
C
= 5A
I
C
= 5A, I
B
= 0.5A
I
C
= 5A, I
B
= 0.5A
40
20
Min.
Max.
10
10
200
0.5
1.5
V
V
Units
µA
µA
* Pulse Test: PW≤350µs, Duty Cycle≤2%
h
FE
Classification
Classification
h
FE1
R
40 ~ 80
O
60 ~ 120
Y
100 ~ 200
©2000 Fairchild Semiconductor International
Rev. A, February 2000
KSD568/569
Typical Characteristics
1.0
I
B
= 18mA
I
B
= 16mA
1000
V
CE
= 1V
I
C
[A], COLLECTOR CURRENT
0.8
I
B
= 14mA
I
B
= 12mA
0.6
I
B
= 10mA
I
B
= 8mA
h
FE
, DC CURRENT GAIN
100
0.4
I
B
= 6mA
I
B
= 4mA
0.2
I
B
= 2mA
0.0
0
10
20
30
40
50
10
0.01
0.1
1
10
V
CE
[V], COLLECTOR-EMITTER VOLTAGE
I
C
[A], COLLECTOR CURRENT
Figure 1. Static Characteristic
Figure 2. DC current Gain
V
BE
(sat), V
CE
(sat)[V], SATURATION VOLTAGE
10
160
I
C
= 10 I
B
140
dT(%), I
C
DERATING
120
1
V
BE
(sat)
100
80
S/b
LIM
60
0.1
S/
b
ITE
D
LI
M
40
IT
ED
V
CE
(sat)
20
0.01
0.01
0
0.1
1
10
0
25
50
o
75
100
125
150
175
200
I
C
[A], COLLECTOR CURRENT
T
C
[ C], CASE TEMPERATURE
Figure 3. Base-Emitter Saturation Voltage
Collector-Emitter Saturation Voltage
Figure 4. Derating Curve Of Safe Operating Areas
100
50
45
u
50
I
C
[A], COLLECTOR CURRENT
10
DI
SS
PA
TI
O
1
P
C
[W], POWER DISSIPATION
40
35
30
25
20
15
10
5
s
0
10
us
0
30
10
LI 0m
s
M
IT
ED
us
s
s
1m
0m
1
N
S/
b
0.1
LI
M
IT
ED
0.01
1
10
100
1000
0
0
25
50
o
75
100
125
150
175
V
CE
[V], COLLECTOR-EMITTER VOLTAGE
T
C
[ C], CASE TEMPERATURE
Figure 5. Forward Bias Safe Operating Area
Figure 6. Power Derating
©2000 Fairchild Semiconductor International
Rev. A, February 2000
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or In
Design
First Production
Definition
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
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No Identification Needed
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©2000 Fairchild Semiconductor International
Rev. E
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