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CD-700-KAC-GFB-XX.XXX

Description
Complete VCXO Based Phase Lock Loop
File Size145KB,14 Pages
ManufacturerETC
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CD-700-KAC-GFB-XX.XXX Overview

Complete VCXO Based Phase Lock Loop

CD-700
Complete VCXO Based Phase Lock Loop
Features
5 x 7.5 x 2 mm, smallest VCXO PLL available
Output Frequencies to 77.76 MHz
5.0 or 3.3 Vdc operation
Tri-State Output
Loss of Signal Alarm
VCXO with CMOS outputs
0/70 or –40/85
°C
temperature range
Hermetically sealed ceramic SMD package
Product is compliant to RoHS directive
Applications
Frequency Translation
Clock Smoothing, Clock Switching
LO
S
PHO OPN
(3)
(2)
OPOUT
(1)
VC
(16)
LOSIN
(4)
NRZ Clock recovery
DSLAM, ADM, ATM, Aggregation, Optical
Switching/Routing, Base Station
OUT1
(13)
DATAIN
(5)
CLKIN
(6)
VCXO
Phase
Detector
and LOS
OP-Amp
Optional
2
n
Divider
Low jitter PLL’s
OUT2
(11)
Description
The VI CD-700 is a user-configurable crystal
based PLL integrated circuit. It includes a digital
phase detector, op-amp, VCXO and additional
integrated functions for use in digital
synchronization applications. Loop filter software
is available as well SPICE models for circuit
simulation.
RCLK RDATA
(9)
(10)
OPP
(15)
GND
(7)
VDD
(14)
HIZ
(12)
Figure 1. CD-700 Block Diagram
Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
Page 1 of 14
Tel:1-88-VECTRON-1
Website: www.vectron.com
Rev : 06Jul05
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