B45185-S2226-J100 datasheet, PDF

B45185-S2226-J100: DescriptionTantalum Capacitor, Polarized, Tantalum, 10V, 5% +Tol, 5% -Tol, 22uF; CategoryPassive components capacitor; File Size487KB，11 Pages; ManufacturerTDK Corporation; Websitehttp://www.tdk.com

Download Datasheet Parametric View All

B45185-S2226-J100 Overview

Tantalum Capacitor, Polarized, Tantalum, 10V, 5% +Tol, 5% -Tol, 22uF

Parameter Name	Attribute value
Objectid	1193055937
package instruction	,
Reach Compliance Code	unknown
ECCN code	EAR99
capacitance	22 µF
Capacitor type	TANTALUM CAPACITOR
Custom functions	Consult Factory
dielectric materials	TANTALUM (WET)
Manufacturer's serial number	B45185-A
negative tolerance	5%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package form	Radial
method of packing	Bulk
polarity	POLARIZED
positive tolerance	5%
Rated (DC) voltage (URdc)	10 V
series	B45185-A

TI engineers teach you how to choose the right power IC: Choosing the right integrated circuit (IC) for a power supply may seem like a piece of cake on the surface. However, this task has become increasingly complex with the introduction of consumer electro...; tiankai001 Analogue and Mixed Signal

MOSFET switching voltage Vgs: As the title says, which parameter in the MOSFET manual can tell me the Vgs voltage when it is fully turned on as a switch? My colleague told me that by default, 12V can fully open most of the NMOS. I...; 平漂流 Analog electronics

Step by step into the LabVIEW programming architecture: 1. Design Patterns [align=left]l For more complex projects, before writing specific code, you must first build a system architecture. The system architecture is the code embodiment of the flow chart. ...; ld056k Analog electronics

Take a look: What a 5000-foot keyboard looks like: ...; 小娜 Mobile and portable

A more detailed introduction to the digital backend process: Digital backend processes 1. Data preparation. For CDN's Silicon Ensemble, the data required for back-end design mainly include the library files of standard cells, macro cells and I/O Pads provided b...; ruopu PCB Design

Application of Verilog HDL Language in FPGA/CPLD Development: [b]Abstract[/b]: Through design examples, the method of using Verilog HDL language to develop FPGA/CPLD is introduced in detail, and the superiority of using Verilog HDL language is shown by comparing...; songrisi FPGA/CPLD

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components