345R-XXLF datasheet, PDF - EEWORLD Datasheet

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345R-XXLF: DescriptionClock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, ROHS COMPLIANT, SSOP-20; CategoryThe embedded processor and controller Microcontrollers and processors; File Size108KB，9 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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345R-XXLF Overview

Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, ROHS COMPLIANT, SSOP-20

345R-XXLF Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	SSOP
package instruction	SSOP,
Contacts	20
Reach Compliance Code	compli
ECCN code	EAR99
JESD-30 code	R-PDSO-G20
JESD-609 code	e3
length	8.65 mm
Number of terminals	20
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	200 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
Master clock/crystal nominal frequency	50 MHz
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage	3.45 V
Minimum supply voltage	3.15 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER
Base Number Matches	1

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DATASHEET

TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER

ICS345

Description

The ICS345 field programmable clock synthesizer

generates up to nine high-quality, high-frequency clock

outputs including multiple reference clocks from a

low-frequency crystal or clock input. It is designed to

replace crystals and crystal oscillators in most electronic

systems.

Using IDT’s VersaClock

software to configure PLLs and

outputs, the ICS345 contains a One-Time Programmable

(OTP) ROM to allow field programmability. Programming

features include eight selectable configuration registers, up

to two sets of four low-skew outputs, and optional Spread

Spectrum outputs.

Using Phase-Locked Loop (PLL) techniques, the device

runs from a standard fundamental mode, inexpensive

crystal, or clock. It can replace multiple crystals and

oscillators, saving board space and cost.

The ICS345 is also available in factory programmed custom

versions for high-volume applications.

Features

•

Packaged as 20-pin SSOP (QSOP) (Pb-free)

Spread spectrum capability

Eight addressable registers

Replaces multiple crystals and oscillators

Output frequencies up to 200 MHz at 3.3 V

Input crystal frequency of 5 to 27 MHz

Input clock frequency of 2 to 50 MHz

Up to nine reference outputs

Up to two sets of four low-skew outputs

Operating voltages of 3.3 V

Advanced, low-power CMOS process

For one output clock, use the ICS341. For two output

clocks, see the ICS342. For three output clocks, see the

ICS343. For more than three outputs, see the ICS348.

Block Diagram

VDD

S 2:S 0

OTP

ROM

w ith

P LL

V alues

P LL1 with

S pread

S pectrum

D ivide

Logic

and

O utput

E nable

C ontrol

C LK 1

C LK 2

C LK 3

P LL2

C LK 4

C LK 5

C LK 6

C LK 7

C LK 8

C rystal or

clock input

X 1/IC LK

C rystal

O scillator

P LL3

C LK 9

E xternal capacitors are

required w ith a crystal input.

GND

PD TS

IDT®

TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER

ICS345

REV P 090613

345R-XXLF Related Products

	345R-XXLF	345RI-XXLFT	345RI-XXLF	345R-XXLFT
Description	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, ROHS COMPLIANT, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, ROHS COMPLIANT, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, ROHS COMPLIANT, SSOP-20	Clock Generator, 200MHz, CMOS, PDSO20, 0.150 INCH, ROHS COMPLIANT, SSOP-20
Is it lead-free?	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to
Parts packaging code	SSOP	SSOP	SSOP	SSOP
package instruction	SSOP,	SSOP,	SSOP,	SSOP,
Contacts	20	20	20	20
Reach Compliance Code	compli	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99
JESD-30 code	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e3	e3	e3	e3
length	8.65 mm	8.65 mm	8.65 mm	8.65 mm
Number of terminals	20	20	20	20
Maximum operating temperature	70 °C	85 °C	85 °C	70 °C
Maximum output clock frequency	200 MHz	200 MHz	200 MHz	200 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SSOP	SSOP	SSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260
Master clock/crystal nominal frequency	50 MHz	50 MHz	50 MHz	50 MHz
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage	3.45 V	3.45 V	3.45 V	3.45 V
Minimum supply voltage	3.15 V	3.15 V	3.15 V	3.15 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL
Terminal surface	MATTE TIN	MATTE TIN	MATTE TIN	MATTE TIN
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.635 mm	0.635 mm	0.635 mm	0.635 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER
Base Number Matches	1	1	1	1

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