EEWORLDEEWORLDEEWORLD

Part Number

Search

852-80-052-30-051101

Description
pcb conn surface mount 1.27mm
CategoryThe connector    The connector   
File Size15KB,3 Pages
ManufacturerPRECI-DIP
Websitehttp://www.precidip.com/en/index.html
Environmental Compliance
Download Datasheet Parametric View All

852-80-052-30-051101 Online Shopping

Suppliers Part Number Price MOQ In stock  
852-80-052-30-051101 - - View Buy Now

852-80-052-30-051101 Overview

pcb conn surface mount 1.27mm

852-80-052-30-051101 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerPRECI-DIP
Reach Compliance Codeunknow
body width0.174 inch
subject depth0.132 inch
body length1.316 inch
Connector typeBOARD CONNECTOR
Contact to complete cooperationSN
Contact completed and terminatedTIN
Contact point genderMALE
Contact materialBRASS
contact modeRECTANGULAR
Contact styleRND PIN-SKT
Dielectric withstand voltage1400VAC V
Durability500 Cycles
Insulation resistance10000000000 Ω
Insulator colorBLACK
Manufacturer's serial number852
Plug contact pitch0.05 inch
Match contact row spacing0.1 inch
Installation methodSTRAIGHT
Installation typeBOARD
Number of connectorsONE
PCB row number2
Number of rows loaded2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
PCB contact patternRECTANGULAR
Rated current (signal)1 A
GuidelineUL
reliabilityCOMMERCIAL
Terminal pitch1.27 mm
Termination typeSURFACE MOUNT
Total number of contacts52
PCB CONNECTORS
SERIES
852
852-PP-NNN-30-051101
Double row
1.27 mm, Surface mount perpendicular gull-wing
Ultraminiature PCB pin connectors, solder tail SMD
mount.
TECHNICAL SPECS.:
Insulator
Flammability
Contact
Connecting pin Ø
Mechanical life
Rated current
Dielectric strength
Coplanarity SMD termination
Black glass filled polyester PCT-GF30-FR
UL 94V-O
Brass CuZn36Pb3 (C36000)
0.41 mm
Min. 500 cycles
1A
Min. 1000 V RMS
Max. 0.1 mm (measured on 25 mm long connectors)
ORDERING INFORMATION:
PP Plating code
10
80
Termination
Gold 0.25 µm
Tin
Connecting pin
Gold 0.25 µm
Tin
NNN number of poles. Replace NNN with the requested number of poles, e.g. 852-10-NNN-30-001101 for a double
row version with 16 pins becomes 852-10-016-30-001101.
PHONE
PRECI-DIP SA
Rue Saint-Henri 11 P.P.Box 834 CH-2800 Delémont / Switzerland
+41 (0)32 421 04 00
FAX
+41 (0)32 421 04 01
E-MAIL
sales@precidip.com www.precidip.com
AM5708 DSP-side waveform simulation
# AM5708 DSP waveform simulation ** Table of Contents ** [TOCM] [TOC] ## 1. Simulation project creation Open CCS and create a new project:Then write the waveform generation file in the main.c file.```...
bqgup Creative Market
430ADC12 error is too large! !
My 430ADC12 can only read accurately when the data is just downloaded. When I turn it on for the second time to read it, the error is very large. 2.6v is read as 3v. Which master knows the reason?...
WEINILUO Microcontroller MCU
●The first choice for getting started with embedded Linux, practical project experience!
Do you want to enter the high-paying embedded field, but feel you don't know where to start? Are you moving forward slowly and laboriously while reading books, looking up information, and asking quest...
rcp2003 Linux and Android
Please help! The design of the sound positioning system! It would be better if there is a paper (with pictures attached) Thank you all for your help! I need it urgently!
[i=s]This post was last edited by paulhyde on 2014-9-15 09:09[/i] If you have any, please send them to my email address [email=buqingyu8248178@yahoo.com.cn]buqingyu8248178@yahoo.com.cn[/email] Thank y...
06990211 Electronics Design Contest
Progress report post on June 4, corrected several issues in the schematic diagram
After checking for ten minutes, I found three errors. It might be because the design was too hasty, so I made some modifications. 1. The P0 port of the microcontroller has no internal pull-up resistor...
莫恩 DIY/Open Source Hardware
[FPGA Design Tips] The Key to Synchronous Design
The key to synchronous design can be seen from the following two circuits The first figure: the circuit structure of synchronous design:The corresponding VHDL program can be expressed as follows:signa...
eeleader FPGA/CPLD

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2386  1106  1468  2075  701  49  23  30  42  15 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号