INTEGRATED CIRCUITS
DATA SHEET
CGY2021G
DCS/PCS 2 W power amplifier
Preliminary specification
Supersedes data of 1996 Oct 15
File under Integrated Circuits, IC17
1997 Apr 03
Philips Semiconductors
Preliminary specification
DCS/PCS 2 W power amplifier
FEATURES
•
Power Amplifier (PA) overall efficiency 50% (DCS)
•
34 dB gain
•
0 dBm input power
•
Gain control range >50 dB
•
Integrated power sensor driver
•
Low output noise floor of PA <−121 dBm/Hz in
DCS/PCS RX band
•
Wide operating temperature range
−20
to +85
°C
•
LQFP 48-pin package
•
Compatible with power ramping controller PCA5077 and
GaAs PA power modulator UBA1710.
APPLICATIONS
•
Hand-held transceivers for DCS/PCS applications
(DCS: 1710 to 1785 MHz and PCS:
1850 to 1910 MHz)
•
1800 MHz Time Division Multiple Access (TDMA)
systems.
QUICK REFERENCE DATA
SYMBOL
V
DD
I
DD
P
o(max)
T
amb
Note
1. For conditions, see Chapters “AC characteristics” and “DC characteristics”.
ORDERING INFORMATION
TYPE
NUMBER
CGY2021G
PACKAGE
NAME
LQFP48
DESCRIPTION
plastic low profile quad flat package; 48 leads; body 7
×
7
×
1.4 mm
PARAMETER
(1)
positive supply voltage
positive peak supply current
maximum output power
operating ambient temperature
−
−
−
−20
MIN.
TYP.
4.5
1.4
34
−
−
−
−
+85
GENERAL DESCRIPTION
CGY2021G
The CGY2021G is a DCS/PCS class 1 GaAs Monolithic
Microwave Integrated Circuit (MMIC) power amplifier
specifically designed to operate at 4.8 V battery supply.
The chip also includes a power sensor driver so that no
directional coupler is required in the power control loop.
The PA requires only a simple low-pass filter to comply
with the DCS/PCS transmit spurious specification. It can
be switched off and its power controlled by monitoring the
actual drain voltage applied to the amplifier stages.
MAX.
V
A
UNIT
dBm
°C
VERSION
SOT313-2
1997 Apr 03
2
Philips Semiconductors
Preliminary specification
DCS/PCS 2 W power amplifier
BLOCK DIAGRAM
CGY2021G
handbook, full pagewidth
VDD1
29
VDD2
33
VDD3
42
18
SENSOR
DRIVER
DETO/VDD5
RFI
27
6,7,8
RFO/VDD4
(1)
31
VGG1
CGY2021G
19
VGG2
MGD771
GND
(1) Ground pins 1 to 5, 9 to 17, 20 to 26, 28, 30, 32, 34 to 41 and 43 to 48.
Fig.1 Block diagram.
PINNING
SYMBOL
GND
RFO/V
DD4
GND
DETO/V
DD5
V
GG2
GND
RFI
GND
V
DD1
GND
V
GG1
GND
V
DD2
GND
V
DD3
GND
PIN
1 to 5
6 to 8
9 to 17
18
19
20 to 26
27
28
29
30
31
32
33
34 to 41
42
43 to 48
ground
PA output and fourth stage supply voltage
ground
power sensor output and supply voltage
third and fourth stage negative gate supply voltage
ground
PA input
ground
first stage supply voltage
ground
first and second stage negative gate supply voltage
ground
second stage supply voltage
ground
third stage supply voltage
ground
DESCRIPTION
1997 Apr 03
3
Philips Semiconductors
Preliminary specification
DCS/PCS 2 W power amplifier
CGY2021G
46 GND
38 GND
41 GND
45 GND
40 GND
39 GND
48 GND
37 GND
44 GND
43 GND
47 GND
handbook, full pagewidth
42 VDD3
GND
GND
GND
GND
GND
RFO/VDD4
RFO/VDD4
RFO/VDD4
GND
1
2
3
4
5
6
7
8
9
36 GND
35 GND
34 GND
33 VDD2
32 GND
31 VGG1
CGY2021G
30 GND
29 VDD1
28 GND
27 RFI
26 GND
25 GND
GND 10
GND 11
GND 12
DETO/VDD5 18
VGG2 19
GND 22
GND 17
GND 24
GND 14
GND 16
GND 21
GND 13
GND 15
GND 20
GND 23
MGD770
Fig.2 Pin configuration.
1997 Apr 03
4
Philips Semiconductors
Preliminary specification
DCS/PCS 2 W power amplifier
FUNCTIONAL DESCRIPTION
Operating conditions
The CGY2021G is designed to meet the European
Telecommunications Standards Institute (ETSI) DCS
documents, the ETS 300 577 specification, which are
defined as follows:
•
t
on
= 542.8
µs
•
T = 4.3 ms
•
Duty cycle = 1/8.
This amplifier is specifically designed for pulse operation
allowing the use of a LQFP48 plastic package.
Power amplifier
The Power Amplifier (PA) consists of four cascaded gain
stages with an open-drain configuration. Each drain has to
be loaded externally by an adequate reactive circuit which
also has to be a DC path to the supply.
CGY2021G
The amplifier bias is set by using a negative voltage
applied at pins V
GG1
and V
GG2
. This negative voltage must
be present before the supply voltage is applied to the
drains to avoid current overstress of the amplifier.
Power sensor driver
The power sensor driver is a buffer amplifier that delivers
an output signal at the DETO pin which is proportional to
the amplifier power. This signal can be detected by
external diodes for power control purpose. As the sensor
signal is taken from the input of the last stage of the PA,
it is isolated from disturbances at the output by the reverse
isolation of the PA output stage. An impedance mismatch
at the PA output therefore does not significantly influence
the signal delivered by the power sensor as this normally
occurs when power sense is made using a directional
coupler. Consequently, the cost and space of using a
directional coupler are saved.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); general operating conditions applied.
SYMBOL
V
DD
V
GG
T
j(max)
T
stg
P
tot
positive supply voltage
negative supply voltage
maximum operating junction temperature
IC storage temperature
total power dissipation
PARAMETER
−
−
−
−
−
MIN.
7
−10
150
150
1.3
MAX.
V
V
°C
°C
W
UNIT
THERMAL CHARACTERISTICS
General operating conditions applied.
SYMBOL
R
th j-c
Note
1. This thermal resistance is a typical value and is measured under DCS/PCS pulse conditions.
PARAMETER
thermal resistance from junction to case; note 1
VALUE
45
UNIT
K/W
1997 Apr 03
5
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