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74LX1G70

Description
TTL/H/L SERIES, 1-INPUT NON-INVERT GATE, PDSO5
Categorysemiconductor    logic   
File Size115KB,10 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Download Datasheet Parametric View All

74LX1G70 Overview

TTL/H/L SERIES, 1-INPUT NON-INVERT GATE, PDSO5

74LX1G70 Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals5
Maximum operating temperature125 Cel
Minimum operating temperature-55 Cel
Maximum supply/operating voltage5.5 V
Minimum supply/operating voltage1.65 V
Rated supply voltage1.8 V
Processing package descriptionSOT-23, 5 PIN
Lead-freeYes
EU RoHS regulationsYes
stateDISCONTINUED
CraftsmanshipCMOS
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE, LOW PROFILE, SHRINK PITCH
surface mountYes
Terminal formGULL WING
Terminal spacing0.9500 mm
terminal coatingNICKEL PALLADIUM GOLD
Terminal locationDUAL
Packaging MaterialsPLASTIC/EPOXY
Temperature levelMILITARY
seriesTTL/H/L
Logic IC typeNON-INVERT
Number of inputs1
propagation delay TPD12 ns
74LX1G70
SINGLE BUFFER
s
s
s
s
s
s
s
s
5V TOLERANT INPUTS
HIGH SPEED: t
PD
= 4.2ns (MAX.) at V
CC
= 3V
LOW POWER DISSIPATION:
I
CC
= 1µA (MAX.) at T
A
= 25°C
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 5.5V
(1.2V Data Retention)
IMPROVED LATCH-UP IMMUNITY
SOT23-5L
SOT323-5L
ORDER CODES
PACKAGE
SOT23-5L
SOT323-5L
T&R
74LX1G70STR
74LX1G70CTR
DESCRIPTION
The 74LX1G70 is an advanced high-speed CMOS
SINGLE BUFFER fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology.
It is ideal for 1.65 to 5.5 V
CC
operations and low
power and low noise applications. The internal
circuit is composed of 3 stages including buffer
output, which provide high noise immunity and
stable output.
Power down protection is provided on input and
output and 0 to 7V can be accepted on inputs with
no regard to the supply voltage. It can be
interfaced to 5V signal environment for inputs in
mixed 3.3/5V system. All inputs and outputs are
equipped with protection circuits against static
discharge.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2004
1/10
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