5962-9223701M2A datasheet, PDF

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5962-9223701M2A: DescriptionBus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20; Categorylogic logic; File Size295KB，19 Pages; Manufacturere2v technologies

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5962-9223701M2A Overview

Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20

5962-9223701M2A Parametric

Parameter Name	Attribute value
Parts packaging code	QLCC
package instruction	QCCN, LCC20,.35SQ
Contacts	20
Reach Compliance Code	compli
Other features	WITH DUAL OUTPUT ENABLE
Control type	ENABLE LOW
series	FCT
JESD-30 code	S-CQCC-N20
JESD-609 code	e0
length	8.89 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.048 A
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN
Encapsulate equivalent code	LCC20,.35SQ
Package shape	SQUARE
Package form	CHIP CARRIER
power supply	5 V
Prop。Delay @ Nom-Su	9 ns
propagation delay (tpd)	9 ns
Certification status	Qualified
Filter level	MIL-STD-883
Maximum seat height	1.905 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
width	8.89 mm
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

Change is in accordance with the notice of revision 5962-R177-93. – mbk

Change is in accordance with the notice of revision 5962-R099-94. – tvn

Update the boilerplate to current requirements as specified in MIL-PRF-38535.

Editorial changes throughout. – jak

Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. -

LTG

DATE (YR-MO-DA)

93-06-18

94-03-09

06-12-11

13-05-16

APPROVED

Michael A. Frye

Monica L. Poelking

Thomas M. Hess

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Joseph A. Kerby

CHECKED BY

Thomas J. Ricciuti

APPROVED BY

Monica L. Poelking

THIS DRAWING IS AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

AMSC N/A

DRAWING APPROVAL DATE

93-03-26

STANDARD

MICROCIRCUIT

DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

http://www.landandmaritime.dla.mil

MICROCIRCUIT, DIGITAL, FAST CMOS,

OCTAL BUFFER/LINE DRIVER WITH THREE-

STATE OUTPUTS, TTL COMPATIBLE INPUTS

AND LIMITED OUTPUT VOLTAGE SWING,

MONOLITHIC SILICON

SIZE

CAGE CODE

REVISION LEVEL

DSCC FORM 2233

APR 97

67268

SHEET

1 OF 17

5962-92237

5962-E381-13

2. APPLICABLE DOCUMENTS

2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part

of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the

solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICATION

MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.

DEPARTMENT OF DEFENSE STANDARDS

MIL-STD-883 -

MIL-STD-1835 -

Test Method Standard Microcircuits.

Interface Standard Electronic Component Case Outlines.

DEPARTMENT OF DEFENSE HANDBOOKS

MIL-HDBK-103 -

MIL-HDBK-780 -

List of Standard Microcircuit Drawings.

Standard Microcircuit Drawings.

(Copies of these documents are available online at

http://quicksearch.dla.mil

or from the Standardization Document Order

Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094).

2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a

specific exemption has been obtained.

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with

MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The

modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for

device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified

herein.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.

3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.

3.2.3 Truth table. The truth table shall be as specified on figure 2.

3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.

3.2.5 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be as specified on

figure 4.

3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5.

3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the

electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full

case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are defined in table I.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-92237

SHEET

3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be

marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer

has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be

marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be

in accordance with MIL-PRF-38535, appendix A.

3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in

MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.

3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535

listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of

compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103

(see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source

of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of

MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.

3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for

device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.

3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of

product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing.

3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime’s agent,

and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore

documentation shall be made available onshore at the option of the reviewer.

3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in

microcircuit group number 37 (see MIL-PRF-38535, appendix A).

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-92237

SHEET

5962-9223701M2A Related Products

	5962-9223701M2A	5962-9223705MSA	5962-9223703MRA	5962-9223701MRA	5962-9223701MSA	5962-9223705MRA	5962-9223703MSA	5962-9223705M2A	5962-9223703M2A
Description	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDFP20, CERPACK-20	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, 0.300 INCH, CERDIP-20	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, 0.300 INCH, CERDIP-20	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDFP20, CERPACK-20	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, 0.300 INCH, CERDIP-20	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDFP20, CERPACK-20	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20
Parts packaging code	QLCC	DFP	DIP	DIP	DFP	DIP	DFP	QLCC	QLCC
package instruction	QCCN, LCC20,.35SQ	DFP, FL20,.3	DIP, DIP20,.3	0.300 INCH, CERDIP-20	DFP, FL20,.3	DIP, DIP20,.3	DFP, FL20,.3	QCCN, LCC20,.35SQ	QCCN, LCC20,.35SQ
Contacts	20	20	20	20	20	20	20	20	20
Reach Compliance Code	compli	compli	compliant	compliant	compliant	compliant	compliant	compliant	compliant
Other features	WITH DUAL OUTPUT ENABLE	WITH DUAL OUTPUT ENABLE	WITH DUAL OUTPUT ENABLE	WITH DUAL OUTPUT ENABLE	WITH DUAL OUTPUT ENABLE	WITH DUAL OUTPUT ENABLE	WITH DUAL OUTPUT ENABLE	WITH DUAL OUTPUT ENABLE	WITH DUAL OUTPUT ENABLE
Control type	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW
series	FCT	FCT	FCT	FCT	FCT	FCT	FCT	FCT	FCT
JESD-30 code	S-CQCC-N20	R-GDFP-F20	R-GDIP-T20	R-GDIP-T20	R-GDFP-F20	R-GDIP-T20	R-GDFP-F20	S-CQCC-N20	S-CQCC-N20
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
MaximumI(ol)	0.048 A	0.048 A	0.048 A	0.048 A	0.048 A	0.048 A	0.048 A	0.048 A	0.048 A
Number of digits	8	8	8	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1	1	1	1
Number of ports	2	2	2	2	2	2	2	2	2
Number of terminals	20	20	20	20	20	20	20	20	20
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QCCN	DFP	DIP	DIP	DFP	DIP	DFP	QCCN	QCCN
Encapsulate equivalent code	LCC20,.35SQ	FL20,.3	DIP20,.3	DIP20,.3	FL20,.3	DIP20,.3	FL20,.3	LCC20,.35SQ	LCC20,.35SQ
Package shape	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	SQUARE	SQUARE
Package form	CHIP CARRIER	FLATPACK	IN-LINE	IN-LINE	FLATPACK	IN-LINE	FLATPACK	CHIP CARRIER	CHIP CARRIER
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
propagation delay (tpd)	9 ns	4.6 ns	5.1 ns	9 ns	9 ns	4.6 ns	5.1 ns	4.6 ns	5.1 ns
Certification status	Qualified	Qualified	Qualified	Qualified	Qualified	Qualified	Qualified	Qualified	Qualified
Filter level	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883	MIL-STD-883
Maximum seat height	1.905 mm	2.3368 mm	5.08 mm	5.08 mm	2.3368 mm	5.08 mm	2.3368 mm	1.905 mm	1.905 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	NO	NO	YES	NO	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	NO LEAD	FLAT	THROUGH-HOLE	THROUGH-HOLE	FLAT	THROUGH-HOLE	FLAT	NO LEAD	NO LEAD
Terminal pitch	1.27 mm	1.27 mm	2.54 mm	2.54 mm	1.27 mm	2.54 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	QUAD	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	QUAD	QUAD
width	8.89 mm	6.9215 mm	7.62 mm	7.62 mm	6.9215 mm	7.62 mm	6.9215 mm	8.89 mm	8.89 mm
Base Number Matches	1	1	1	1	1	1	1	1	1
length	8.89 mm	-	24.13 mm	24.13 mm	-	24.13 mm	-	8.89 mm	8.89 mm
Prop。Delay @ Nom-Sup	-	-	5.1 ns	9 ns	9 ns	4.7 ns	5.1 ns	4.7 ns	5.1 ns

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