
DDR DRAM,
| Parameter Name | Attribute value |
| Is it Rohs certified? | conform to |
| Objectid | 7215375327 |
| package instruction | TFBGA, |
| Reach Compliance Code | compliant |
| Country Of Origin | Mainland China |
| ECCN code | EAR99 |
| Date Of Intro | 2018-06-20 |
| YTEOL | 5.1 |
| access mode | MULTI BANK PAGE BURST |
| Other features | AUTO/SELF REFRESH |
| JESD-30 code | R-PBGA-B96 |
| length | 13 mm |
| memory density | 2147483648 bit |
| Memory IC Type | DDR3L DRAM |
| memory width | 16 |
| Number of functions | 1 |
| Number of ports | 1 |
| Number of terminals | 96 |
| word count | 134217728 words |
| character code | 128000000 |
| Operating mode | SYNCHRONOUS |
| Maximum operating temperature | 95 °C |
| Minimum operating temperature | -40 °C |
| organize | 128MX16 |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | TFBGA |
| Package shape | RECTANGULAR |
| Package form | GRID ARRAY, THIN PROFILE, FINE PITCH |
| Maximum seat height | 1.2 mm |
| self refresh | YES |
| Maximum supply voltage (Vsup) | 1.45 V |
| Minimum supply voltage (Vsup) | 1.283 V |
| Nominal supply voltage (Vsup) | 1.35 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | INDUSTRIAL |
| Terminal form | BALL |
| Terminal pitch | 0.8 mm |
| Terminal location | BOTTOM |
| width | 9 mm |