IDT7285L15PA datasheet, PDF - EEWORLD Datasheet

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IDT7285L15PA: Description1K X 9 BI-DIRECTIONAL FIFO, 15 ns, PDSO56; Categorystorage; File Size144KB，12 Pages; ManufacturerIDT (Integrated Device Technology, Inc.); Websitehttp://www.idt.com/

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IDT7285L15PA Overview

1K X 9 BI-DIRECTIONAL FIFO, 15 ns, PDSO56

IDT7285L15PA Parametric

Parameter Name	Attribute value
Number of functions	2
Number of terminals	56
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	4.5 V
Rated supply voltage	5 V
maximum access time	15 ns
Processing package description	TSSOP-56
state	ACTIVE
Craftsmanship	CMOS
packaging shape	Rectangle
Package Size	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
terminal coating	tin lead
Terminal location	pair
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
memory width	9
organize	1K × 9
storage density	9216 deg
operating mode	ASYNCHRONOUS
Number of digits	1024 words
Number of digits	1K
cycle	25 ns
Memory IC type	Two-way first-in-first-out

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CMOS DUAL ASYNCHRONOUS FIFO

DUAL 256 x 9, DUAL 512 x 9,

DUAL 1,024 x 9, DUAL 2,048 x 9,

DUAL 4,096 x 9, DUAL 8,192 x 9

IDT7280

IDT7281

IDT7282

IDT7283

IDT7284

IDT7285

FEATURES:

•

DESCRIPTION:

The IDT7280/7281/7282/7283/7284/7285 are dual-FIFO memories that

load and empty data on a first-in/first-out basis. These devices are functional

and compatible to two IDT7200/7201/7202/7203/7204/7205 FIFOs in a single

package with all associated control, data, and flag lines assigned to separate

pins. The devices use Full and Empty flags to prevent data overflow and

underflow and expansion logic to allow for unlimited expansion capability in both

word size and depth.

The reads and writes are internally sequential through the use of ring pointers,

with no address information required to load and unload data. Data is toggled

in and out of the devices through the use of the Write (W) and Read (R) pins.

The devices utilize a 9-bit wide data array to allow for control and parity bits

at the user’s option. This feature is especially useful in data communications

applications where it is necessary to use a parity bit for transmission/reception

error checking. It also features a Retransmit (RT) capability that allows for reset

of the read pointer to its initial position when

is pulsed LOW to allow for

retransmission from the beginning of data. A Half-Full Flag is available in the

single device mode and width expansion modes.

These FIFOs are fabricated using IDT’s high-speed CMOS technology.

They are designed for those applications requiring asynchronous and simul-

taneous read/writes in multiprocessing and rate buffer applications.

•

The IDT7280 is equivalent to two IDT7200 256 x 9 FIFOs

The IDT7281 is equivalent to two IDT7201 512 x 9 FIFOs

The IDT7282 is equivalent to two IDT7202 1,024 x 9 FIFOs

The IDT7283 is equivalent to two IDT7203 2,048 x 9 FIFOs

The IDT7284 is equivalent to two IDT7204 4,096 x 9 FIFOs

The IDT7285 is equivalent to two IDT7205 8,192 x 9 FIFOs

Low power consumption

— Active: 685 mW (max.)

— Power-down: 83 mW (max.)

Ultra high speed—12 ns access time

Asynchronous and simultaneous read and write

Offers optimal combination of data capacity, small foot print

and functional flexibility

Ideal for bi-directional, width expansion, depth expansion,

bus-matching, and data sorting applications

Status Flags: Empty, Half-Full, Full

Auto-retransmit capability

High-performance CMOS technology

Space-saving TSSOP

Industrial temperature range (–40°C to +85°C) is available

FUNCTIONAL BLOCK DIAGRAM

DATA INPUTS

(DA

-DA

)

WRITE

CONTROL

WRITE

POINTER

THREE-

STATE

BUFFERS

RAM

ARRAY A

256 x 9

512 x 9

1,024 x 9

2,048 x 9

4,096 x 9

8,192 x 9

RSA

WRITE

CONTROL

WRITE

POINTER

DATA INPUTS

(DB

-DB

)

RAM

ARRAY B

256 x 9

512 x 9

1,024 x 9

2,048 x 9

4,096 x 9

8,192 x 9

THREE-

STATE

BUFFERS

RSB

READ

POINTER

READ

POINTER

READ

CONTROL

FLAG

LOGIC

EXPANSION

LOGIC

RESET

LOGIC

READ

CONTROL

FLAG

LOGIC

EXPANSION

LOGIC

RESET

LOGIC

XIA

XOA/HFA

FFA

EFA

DATA

OUTPUTS

(QA

-QA

)

FLA/RTA

XIB

XOB/HFB

FFB

EFB

DATA

OUTPUTS

(QB

-QB

)

FLB/RTB

3208 drw 01

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

2002

SEPTEMBER 2002

DSC-3208/5

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