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NSBA144WDXV6T1G

Description
trans prebias dual pnp sot563
CategoryDiscrete semiconductor    The transistor   
File Size127KB,8 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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NSBA144WDXV6T1G Overview

trans prebias dual pnp sot563

NSBA144WDXV6T1G Parametric

Parameter NameAttribute value
Brand NameON Semiconduc
Is it lead-free?Lead free
MakerON Semiconductor
package instructionSMALL OUTLINE, R-PDSO-F6
Contacts6
Manufacturer packaging code463A-01
Reach Compliance Codecompli
ECCN codeEAR99
Factory Lead Time17 weeks
Other featuresBUILT IN BIAS RESISTOR RATIO IS 2.1
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSEPARATE, 2 ELEMENTS WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)80
JESD-30 codeR-PDSO-F6
JESD-609 codee3
Humidity sensitivity level1
Number of components2
Number of terminals6
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typePNP
Maximum power dissipation(Abs)0.5 W
Certification statusNot Qualified
surface mountYES
Terminal surfaceTin (Sn)
Terminal formFLAT
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Transistor component materialsSILICON
MUN5137DW1,
NSBA144WDXV6,
NSBA144WDP6
Dual PNP Bias Resistor
Transistors
R1 = 47 kW, R2 = 22 kW
PNP Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
(3)
R
1
Q
1
Q
2
R
2
(4)
(5)
R
1
(6)
http://onsemi.com
PIN CONNECTIONS
(2)
(1)
R
2
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MARKING DIAGRAMS
6
0P M
G
G
1
SOT−363
CASE 419B
MAXIMUM RATINGS
(T
A
= 25°C, common for Q1 and Q2, unless otherwise noted)
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current
Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
40
10
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
0P/J
M
G
1
M
G
G
J
1
0P M
G
G
SOT−563
CASE 463A
SOT−963
CASE 527AD
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
MUN5137DW1T1G
NSVMUN5137DW1T1G
NSBA144WDXV6T1G
NSBA144WDP6T5G
Package
SOT−363
SOT−363
SOT−563
SOT−963
Shipping
3,000 / Tape & Reel
3,000 / Tape & Reel
4,000 / Tape & Reel
8,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2013
October, 2013
Rev. 1
1
Publication Order Number:
DTA144WD/D

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