LT4351
MOSFET Diode-OR Controller
FEATURES
s
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DESCRIPTIO
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Low Loss Replacement for ORing Diode in Multiple
Sourced Power Supplies
External N-Channel MOSFETs for High Current
Capability
Internal Boost Regulator Supply for MOSFET
Gate Drive
Wide Input Range: 1.2V to 18V
Fast Switching MOSFET Gate Control
Input Under and Overvoltage Detection
STATUS and FAULT Outputs for Monitoring
Internal MOSFET Gate Clamp
Available in a 10-pin MSOP
The LT4351 creates a near-ideal diode using external
single or back-to-back N-channel MOSFETs. This ideal
diode function permits low loss ORing of multiple power
sources. Power sources can easily be ORed together to
increase total system power and reliability with minimal
effect on supply voltage or efficiency. Disparate power
supplies can be efficiently ORed together.
The IC monitors the input supply with respect to the load
and turns on the MOSFET(s) when the input supply is
higher. If the MOSFET’s R
DS(ON)
is sufficiently small, the
LT4351 will regulate the voltage across the MOSFET(s) to
15mV. A STATUS pin indicates the MOSFET on state.
An internal boost regulator generates the MOSFET gate
drive voltage. Low operating voltage allows for OR’ing of
supplies as low as 1.2V.
The LT4351 will disable power passage during undervolt-
age or overvoltage conditions. These voltages are set by
resistive dividers on the UV and OV pins. The undervoltage
threshold has user programmable hysteresis. Overvolt-
age detection is filtered to reduce false triggering.
The LT4351 is available in a 10-pin MSOP.
APPLICATIO S
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Paralleled Power Supplies
Uninterrupted Supplies
High Availability Systems
N + 1 Redundant Power Supplies
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
Dual 5V Redundant Supply
Si4862DY
5V
10µF
POWER
SUPPLY
1
1µF
MBR0530
SW
4.7µH
UV
STATUS
FAULT
OV
1.47k
1%
GND
STATUS
FAULT
GND
OV
1.47k
1%
4351 TA01
Si4862DY
5V COMMON
10µF
POWER
SUPPLY
2
GATE
V
IN
V
DD
1µF
MBR0530
SW
UV
4.7µH
5V
C
LOAD
R
LOAD
V
IN
V
DD
GATE
OUT
OUT
24.9k
1%
232Ω
1%
LT4351
LT4351
U
24.9k
1%
232Ω
1%
sn4351 4351fs
U
U
1
LT4351
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
GATE
V
DD
V
IN
SW
GND
1
2
3
4
5
10
9
8
7
6
OUT
STATUS
FAULT
UV
OV
V
IN
Voltage ............................................... – 0.3V to 19V
OUT Voltage ............................................ – 0.3V to 19V
V
DD
Voltage ............................................. – 0.3V to 30V
FAULT, STATUS Voltages ........................ – 0.3V to 30V
FAULT, STATUS Current ........................................ 8mA
UV, OV Voltages ........................................ – 0.3V to 9V
SW Voltage .............................................. – 0.3V to 32V
Operating Temperature Range
LT4351C .................................................. 0°C to 70°C
LT4351I .............................................. – 40°C to 85°C
Junction Temperature (Note 2) ............................ 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LT4351CMS
LT4351IMS
MS PART MARKING
LTZZ
LTA1
MS PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 120°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
IN
I
VIN
V
UV(TH)
I
UV(HYST)
I
UV
V
OV(TH)
I
OV
V
F(ON)
I
F(OFF)
Boost Supply
V
BR
t
OFF
I
SWLIM
Gate Drive
V
IOR
∆V
GL
∆V
G(MAX)
V
GOFF
I
GSO
I
GSK
Input to Output Regulated Voltage
Gate Voltage Limit
Maximum Gate Voltage
Gate Off Voltage
Gate Source Current
Gate Sink Current
Boost Regulation Trip Voltage
Boost Supply Off Time
Boost Supply Switch Current Limit
PARAMETER
Operating Range
V
IN
Supply Current
Supply and Protection
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= V
OUT
= 5V, V
DD
= 16.1V, V
UV
= 0.4V, V
OV
= 0.2V, GATE Open,
unless otherwise specified.
CONDITIONS
q
MIN
1.2
TYP
MAX
18
UNITS
V
mA
mA
mV
µA
nA
mV
nA
V
µA
V
ns
mA
mV
V
V
V
A
A
sn4351 4351fs
V
IN
= 1.2V, V
OUT
= 1.1V, V
DD
= 12.3V
V
IN
= 18V, V
OUT
= 17.9V, V
DD
= 29.1V
Difference Between I
UV
at V
UV(TH)
+ 10mV
and V
UV(TH)
– 10mV
V
UV
= V
UV(TH)
+ 10mV
OV Rising
V
OV
= V
OV(TH)
– 10mV
I
F
= 5mA In Fault Condition
V
F
= 30V, V
IN
= 4.9V
Measured as V
DD
to V
IN
, Rising Edge
q
q
q
q
q
q
q
q
q
1.41
1.71
290
7
300
10
–100
290
300
–100
0.14
0.04
10.2
350
4
10.7
600
450
15
–2.3
7
7.4
0.16
0.670
0.670
2.0
2.1
310
13
–400
310
–400
0.25
1
11.1
650
25
–3
7.8
0.30
Undervoltage Turn-Off Voltage Threshold UV Falling
I
UV
Hysteresis
UV Input Bias Current
Overvoltage Threshold
OV Input Bias Current
FAULT Pin On Voltage
FAULT Pin Leakage Current
q
q
q
V
IN
= 5V, V
OUT
= 4.9V, V
DD
= 13V Measured with
Respect to V
DD
V
IN
= 5V, V
OUT
= 4.9V, V
DD
= 16.1V Measured with
Respect to V
OUT
V
OUT
= 5.1V
V
OUT
= 4.9V, V
GATE
= 9V
V
OUT
= 4.9V, V
GATE
= 9V
q
q
q
2
U
W
U
U
W W
W
LT4351
ELECTRICAL CHARACTERISTICS
SYMBOL
V
DD
I
VDD
PARAMETER
Operating Range
V
DD
Supply Current
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= V
OUT
= 5V, V
DD
= 16.1V, V
UV
= 0.4V, V
OV
= 0.2V, GATE Open,
unless otherwise specified.
CONDITIONS
q
MIN
q
q
TYP
3.0
3.6
0.75
MAX
30
4.0
5.6
1
230
0.25
1
UNITS
V
mA
mA
V
mV
V
µA
V
IN
= 1.2V, V
OUT
= 1.1V, V
DD
= 12.3V, GATE Open
V
IN
= 18V, V
OUT
= 17.9V, V
DD
= 29.1V, GATE Open
V
OUT
= 4.9V, I
STATUS
= 1mA
V
OUT
Falling, Measured with Respect to V
IN
I
ST
= 5mA, V
OUT
= 4.9V, Status On
V
ST
= 30V, Status Off, V
IN
= 4.9V
Status Functions
∆V
GIS
V
IOGF
V
STON
I
STOFF
Min Gate Voltage for Turning On Status
V
IN
to V
OUT
Fault Voltage
with Open Gate
Status Pin On Voltage
Status Pin Leakage Current
q
185
q
q
210
0.13
0.04
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
T
J
= T
A
+ (P
D
• 120°C/W)
TYPICAL PERFOR A CE CHARACTERISTICS
Specifications are at T
A
= 25°C unless otherwise specified.
Undervoltage Threshold
vs Temperature
310
308
306
304
V
IN
= 1.2V
V
IN
= 5V
V
IN
= 12V
V
IN
= 20V
305
303
301
V
UV(TH)
(mV)
V
OV(TH)
(mV)
302
300
298
296
294
292
290
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
V
UV(TH)
(mV)
50
25
0
75
TEMPERATURE (°C)
100
125
U W
4351 G01
Overvoltage Threshold
vs Temperature
V
IN
= 1.2V
V
IN
= 5V
V
IN
= 12V
V
IN
= 20V
310
308
306
304
302
300
298
296
294
292
293
–50 –25
290
Undervoltage Threshold vs V
IN
299
297
295
0
2
4
6
8
10 12 14 16 18 20
V
IN
(V)
4351 G03
4351 G02
sn4351 4351fs
3
LT4351
TYPICAL PERFOR A CE CHARACTERISTICS
Specifications are at T
A
= 25°C unless otherwise specified.
Overvoltage Hysteresis
vs Temperature
25
V
IN
= 5V
20
18
16
Overvoltage Threshold vs V
IN
310
308
306
OV HYSTERESIS (mV)
TURN-OFF DELAY (µs)
304
V
UV(TH)
(mV)
302
300
298
296
294
292
290
0
2
4
6
8
10 12 14 16 18 20
V
IN
(V)
4351 G04
I
VIN
vs Temperature
2.0
1.9
1.8
1.7
I
VDD
(mA)
V
IN
= 1.2V
V
IN
= 5V
V
IN
= 12V
V
IN
= 20V
1.5
1.4
1.3
1.2
1.1
1.0
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
V
GOFF
(V)
I
VIN
(mA)
1.6
GATE Pin Turn On and Off
Waveform with 10nF Capacitor
Load
TURN ON
V
SW
2V/DIV
V
IN
= 5V
50ns/DIV
V
OUT
= 4.9V to 5.1V SQUARE WAVE
4
U W
4351 G07
Overvoltage Turn-Off Delay
vs Overvoltage Overdrive
V
IN
= 5V
20
14
12
10
8
6
4
2
15
10
5
0
–50 –25
0
50
25
0
75
TEMPERATURE (°C)
100
125
0
35
20
15
10
25
30
5
OV VOLTAGE ABOVE THRESHOLD (mV)
3451 G06
4351 G05
I
VDD
vs Temperature
4.5
V
IN
= 1.2V
V
IN
= 5V
V
IN
= 12V
V
IN
= 20V
0.50
0.45
0.40
0.35
3.5
0.30
0.25
0.20
0.15
2.5
0.10
0.05
2.0
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
Gate Off Voltage vs Temperature
4.0
V
IN
= 5V
V
OUT
= 5V
3.0
V
IN
= 5V
V
OUT
= 5.1V
0
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
4351 G08
4351 G09
Typical SW Pin Waveform
V
SW
5V/DIV
TURN OFF
3451 G10
V
IN
= 5V
L = 4.7µH
500ns/DIV
3451 G11
sn4351 4351fs
LT4351
TYPICAL PERFOR A CE CHARACTERISTICS
Specifications are at T
A
= 25°C unless otherwise specified.
SW Pin Waveform at Maximum
Boost Regulator Output
Typical SW Pin Waveform
V
SW
5V/DIV
V
IN
= 5V
4.7µH INDUCTOR
PI FU CTIO S
GATE (Pin 1):
MOSFET Gate Drive Pin. This pin is tied to
the gate(s) of the external N-channel MOSFET(s). The
GATE pin drives high when UV is above the V
UV(TH)
threshold, OV is below the V
OV(TH)
threshold and V
IN
is
greater than OUT by 15mV. When not driven high, GATE
actively pulls to GND. GATE can sink or source up to
600mA.
V
DD
(Pin 2):
Gate Drive Supply Pin. This is the supply pin
for the gate drive amplifier. It is either generated by the
onboard boost regulator or supplied externally. When
turning on the MOSFET(s), a large high current pulse flows
through this pin. Bypass the pin with a 1µF capacitor
placed in close proximity to the part. The voltage on this
pin is also the feedback for the boost regulator. If the V
DD
voltage exceeds the V
IN
voltage by 10.7V, the boost switch
is held off.
V
IN
(Pin 3):
Input Supply Pin. This pin is the supply pin for
the control circuitry and the boost regulator. It is also one
input in conjunction with OUT for controlling the
MOSFET(s). Bypassing should include a low ESR/ESL
capacitor placed in close proximity to the part.
SW (Pin 4):
Boost Regulator Switch Pin. This pin is the
boost regulator switch output. It is connected to the boost
inductor and the boost diode. Peak switch current is
limited internally to 450mA. If an external V
DD
supply is
used, leave this pin open.
GND (Pin 5):
Device Ground Pin. This pin is ground for the
boost switch, gate driver as well as the control circuitry.
Tie the V
IN
and V
DD
bypass capacitors and ground plane
close to this pin to minimize the effects of switching
currents on part performance.
U W
V
SW
5V/DIV
10µs/DIV
3451 G12
V
IN
= 5V
4.7µH INDUCTOR
10µs/DIV
3451 G13
U
U
U
sn4351 4351fs
5
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