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841S101EGILFT

Description
IC clk generator pll 16-tssop
Categorysemiconductor    Analog mixed-signal IC   
File Size437KB,24 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
Environmental Compliance  
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841S101EGILFT Overview

IC clk generator pll 16-tssop

841S101EGILFT Parametric

Parameter NameAttribute value
Datasheets
ICS841S101I
PCN Design/Specificati
Assembly Lot Number Scheme 12/Oct/2013
PCN Packaging
Reel Standardization 09/Apr/2014
Standard Package2,500
CategoryIntegrated Circuits (ICs)
FamilyClock/Timing - Application Specific
PackagingTape & Reel (TR)
PLLYes
Main PurposePCI Express (PCIe)
InpuCrystal
OutpuHCSL
Number of Circuits1
Ratio - InpuOutpu
Differential - InpuOutpu
Frequency - Max100MHz
Voltage - Supply3.135 V ~ 3.465 V
Operating Temperature-40°C ~ 85°C
Mounting TypeSurface Mou
Package / Case16-TSSOP (0.173", 4.40mm Width)
Supplier Device Package16-TSSOP
Other NamesICS841S101EGILFTICS841S101EGILFT-ND
Crystal-to-HCSL, 100MHz PCI Express
Clock Synthesizer
841S101
Datasheet
General Description
The 841S101 is a PLL-based clock synthesizer specifically designed
for PCI_Express™ Clock applications. This device generates a
100MHz differential HCSL clock from a input reference of 25MHz.
The input reference may be derived from an external source or by the
addition of a 25MHz crystal to the on-chip crystal oscillator. An
external reference is applied to the XTAL_IN pin with the XTAL_OUT
pin left floating.The device offers spread spectrum clock output for
reduced EMI applications. An I
2
C bus interface is used to enable or
disable spread spectrum operation as well as select either a down
spread value of -0.35% or -.5%.The 841S101 is available in a
lead-free 16-Lead TSSOP package.
Features
One 0.7V current mode differential HCSL output pair
Crystal oscillator interface: 25MHz
Output frequency: 100MHz
RMS phase jitter @ 100MHz (12kHz – 20MHz): 1.23ps (typical)
Cycle-to-cycle jitter: 20ps (maximum)
I
2
C support with readback capabilities up to 400kHz
Spread Spectrum for electromagnetic interference (EMI) reduction
3.3V operating supply mode
-40°C to 85°C ambient operating temperature
Available in a lead-free (RoHS 6) package
PCI Express Gen 1, 2 and 3 jitter compliant
HiPerClockS™
Block Diagram
XTAL_IN
XTAL_OUT
SDATA
SCLK
IREF
Pullup
Pullup
25MHz
Pin Assignment
V
SS
OSC
PLL
Divider
Network
SRCT0
SRCC0
V
DD
1
2
3
4
5
6
7
8
I
2
C
Logic
SRCT0
SRCC0
V
D D
V
SS
IREF
V
SS
16
15
14
13
12
11
10
9
V
D D
SDATA
SCLK
XTAL_ OUT
XTAL_IN
V
D D
V
SS
V
D DA
841S101
16-Lead TSSOP
4.4mm x 5.0mm x 0.925mm package body
G Package
Top View
©2016 Integrated Device Technology, Inc.
1
Revision B, May 25, 2016
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