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84330CYT

Description
IC synthesizer 700mhz 28-plcc
Categorysemiconductor    Analog mixed-signal IC   
File Size774KB,21 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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84330CYT Overview

IC synthesizer 700mhz 28-plcc

84330CYT Parametric

Parameter NameAttribute value
Datasheets
ICS84330C
Standard Package1,000
CategoryIntegrated Circuits (ICs)
FamilyClock/Timing - Clock Generators, PLLs, Frequency Synthesizers
PackagingTape & Reel (TR)
TypeClock/Frequency Synthesize
PLLYes
InpuCrystal
OutpuLVPECL
Number of Circuits1
Ratio - InpuOutpu
Differential - InpuOutpu
Frequency - Max700MHz
Divider/MultiplieYes/N
Voltage - Supply3.135 V ~ 3.465 V
Operating Temperature0°C ~ 70°C
Mounting TypeSurface Mou
Package / Case28-LCC (J-Lead)
Supplier Device Package28-PLCC
Other NamesICS84330CYTICS84330CYT-ND
700MHz, Low Jitter, Crystal-to-3.3V
Differential LVPECL Frequency Synthesizer
ICS84330C
DATA SHEET
General Description
The ICS84330C is a general purpose, single output
high frequency synthesizer and a member of the
HiPerClockS™
HiPerClockS™ family of High Performance Clock
Solutions from IDT. The VCO operates at a frequency
range of 250MHz to 700MHz. The VCO and output
frequency can be programmed using the serial or parallel interfaces
to the configuration logic. The output can be configured to divide the
VCO frequency by 1, 2, 4, and 8. Output frequency steps as small as
250kHz to 2MHz can be achieved using a 16MHz crystal depending
on the output divider settings.
Features
Fully integrated PLL, no external loop filter requirements
One differential 3.3V LVPECL output
Crystal oscillator interface: 10MHz to 25MHz
Output frequency range: 31.25MHz to 700MHz
VCO range: 250MHz to 700MHz
Parallel or serial interface for programming M and N dividers during
power-up
RMS period jitter: 5ps (maximum)
Cycle-to-cycle jitter: 40ps (maximum)
3.3V supply voltage
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
ICS
nFOUT
FOUT
V
CC
V
CC
V
EE
TEST
Pin Assignment
V
CC
32 31 30 29 28 27 26 25
S_CLOCK
S_DATA
S_LOAD
V
CCA
V
CCA
FREF_EXT
XTAL_SEL
XTAL1
1
2
3
4
5
6
7
8
9
XTAL2
V
EE
24
nc
N1
N0
M8
M7
M6
M5
M4
S_CLOCK
S_DATA
S_LOAD
V
CCA
FREF_EXT
XTAL_SEL
XTAL1
26
27
18
17
N1
N0
M8
M7
M6
M5
M4
ICS84330C
32 Lead VFQFN
K Package
5mm x 5mm x 0.925mm
package body
Top View
10 11 12 13 14 15 16
M2
OE
nP_LOAD
M0
M1
M3
nc
23
22
21
20
19
18
17
Pin Assignments
V
CC
nFOUT
25 24 23 22 21 20 19
ICS84330C
16
28
28 Lead PLCC
V Package
15
1
11.6mm x 11.4mm x 4.1mm
14
2
package body
Top View
13
3
4
5
XTAL2
FOUT
TEST
V
CC
V
EE
V
EE
Block Diagram
OE
XTAL1
OSC
XTAL2
FREF_EXT
Pulldown
Pullup
12
6
OE
7
nP_LOAD
8
M0
9
M1
10 11
M2
V
CC
TEST
M3
V
EE
1
FOUT
0
V
CC
nFOUT
÷ 16
XTAL_SEL
Pullup
32 31 30 29 28 27 26 25
PLL
PHASE DETECTOR
1
VCO
÷M
÷2
0
÷2
÷4
÷8
÷1
S_CLOCK
S_DATA
S_LOAD
FOUT
nFOUT
V
CCA
V
CCA
FREF_EXT
1
2
3
4
5
6
7
8
9
XTAL2
V
CC
V
EE
24
nc
N1
N0
M8
M7
M6
M5
M4
ICS84330C
32 Lead LQFP
Y Package
7mm x 7mm x 1.4mm
package body
Top View
23
22
21
20
19
18
17
M2
M3
OE
nP_LOAD
M0
M0:M8
N0:N1
Pullup
Pullup
ICS84330CV REVISION D JULY 17, 2009
1
©2009 Integrated Device Technology, Inc.
M1
nc
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
Pulldown
Pulldown
Pulldown
Pullup
XTAL_SEL
CONFIGURATION
INTERFACE
LOGIC
TEST
XTAL1
10 11 12 13 14 15 16

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