XC5VLX330T-1FFG1738C datasheet, PDF

Datasheet> All Categories > Programmable logic devices> Programmable logic> XC5VLX330T-1FFG1738C

XC5VLX330T-1FFG1738C: DescriptionIC fpga 960 I/O 1738fcbga; CategoryProgrammable logic devices Programmable logic; File Size2MB，166 Pages; ManufacturerXILINX; Websitehttps://www.xilinx.com/; Environmental Compliance

Download Datasheet Parametric View All

XC5VLX330T-1FFG1738C Overview

IC fpga 960 I/O 1738fcbga

XC5VLX330T-1FFG1738C Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	BGA
package instruction	BGA, BGA1738,42X42,40
Contacts	1738
Reach Compliance Code	_compli
ECCN code	3A001.A.7.A
maximum clock frequency	1098 MHz
JESD-30 code	S-PBGA-B1738
JESD-609 code	e1
length	42.5 mm
Humidity sensitivity level	4
Configurable number of logic blocks	25920
Number of entries	960
Number of logical units	331776
Output times	960
Number of terminals	1738
Maximum operating temperature	85 °C
Minimum operating temperature
organize	25920 CLBS
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA1738,42X42,40
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	245
power supply	1,2.5 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	3.5 mm
Maximum supply voltage	1.05 V
Minimum supply voltage	0.95 V
Nominal supply voltage	1 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	42.5 mm
Base Number Matches	1

Preview

Download Datasheet

View All

Virtex-5 FPGA

Configuration User

Guide

UG191 (v3.12) May 8, 2017

Disclaimer

The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum

extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL

WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF

MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether

in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising

under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or

consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action

brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same.

Xilinx assumes no obligation to correct any errors contained in the Materials or to notify you of updates to the Materials or to product

specifications. You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are

subject to the terms and conditions of Xilinx’s limited warranty, please refer to Xilinx’s Terms of Sale which can be viewed at

www.xilinx.com/legal.htm#tos;

IP cores may be subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx

products are not designed or intended to be fail-safe or for use in any application requiring fail-safe performance; you assume sole risk and

liability for use of Xilinx products in such critical applications, please refer to Xilinx’s Terms of Sale which can be viewed at

www.xilinx.com/legal.htm#tos.

herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.

Revision History

The following table shows the revision history for this document.

Date

04/14/2006

05/12/2006

Version

1.0

1.1

Revision

Initial Xilinx release.

Minor typographical edits to entire document to improve clarity.

Chapter 1: Revised

Table 1-1, Table 1-2, Table 1-9, Table 1-11.

Chapter 2: Clarified bit-swapping (Byte Swap rule) throughout. Updated

“Page Mode

Support,” page 71.

Chapter 8: Added new section called

“MultiBoot Bitstream Spacing,” page 155.

Chapter 9: Added

“Post_CRC Constraints”

section.

Virtex-5 FPGA Configuration Guide

www.xilinx.com

UG191 (v3.12) May 8, 2017

Recommended Resources

Four connection methods and characteristics comparison of differential amplifier circuit c

Voltage source three-phase inverter structure circuit diagram

RX5RL basic application circuit diagram

Active high power factor correction pre-regulator circuit diagram using UC3852

white noise generator circuit

Bridge pickup type speaker protection circuit (3)

Please help me find out what circuit the box in the attached picture is.: Please help me see what the boxed part in the attached picture is and what is its function?...; 一沙一世 stm32/stm8

!!! Problems with saving serial port data to files: void COM232task(void) { char filename[12]="hello2"; struct fs_descrip *file; unsigned char sec_buf[512]; file = fs_fopen(filename, O_WRITE ? O_APPEND); if( serhit1(c1) ){ sec_buf[i]=getser1(c1);i++; i...; mimi Embedded System

About this Hercules Design Event: Hello everyone, I am an engineer from Texas Instruments. I just talked with the engineers who participated in this event. It's great to meet you all~! Let's communicate more here in the future. Now I'...; renton Microcontroller MCU

How to contact management?: If necessary, contact the administrator of the website. Where can I find the link?...; dontium Suggestions & Announcements

[Help] PIC16F526 problem: I have a technical question for you. Does the PB4 port of PIC16F526 have the function of waking up the microcontroller by level change or does the PB4 port have an input function?The program is ported...; jazyjs Microchip MCU

Major breakthrough in complementary bipolar process technology: Title: Major breakthrough in complementary bipolar process technologyAuthor: adminPublished: 2005-3-9 Major breakthrough in complementary bipolar process technology Ma Caoyuan, School of Information a...; fighting Analog electronics

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components