LUPXA255A0C300 datasheet, PDF - EEWORLD Datasheet

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LUPXA255A0C300: DescriptionIC micro processor 300mhz 256bga; CategoryThe embedded processor and controller Microcontrollers and processors; File Size872KB，40 Pages; ManufacturerIntel; Websitehttp://www.intel.com/; Environmental Compliance

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LUPXA255A0C300 Overview

IC micro processor 300mhz 256bga

LUPXA255A0C300 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Intel
Parts packaging code	BGA
package instruction	BGA,
Contacts	256
Reach Compliance Code	compli
ECCN code	3A001.A.2.C
Address bus width	26
bit size	32
boundary scan	YES
maximum clock frequency	3.6864 MHz
External data bus width	32
Format	FIXED POINT
Integrated cache	YES
JESD-30 code	S-PBGA-B256
JESD-609 code	e1
length	17 mm
low power mode	YES
Number of terminals	256
Maximum operating temperature	85 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	250
Certification status	Not Qualified
Maximum seat height	2 mm
speed	300 MHz
Maximum supply voltage	1.21 V
Minimum supply voltage	1.045 V
Nominal supply voltage	1.1 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
width	17 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR

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Intel® PXA255 Processor

Electrical, Mechanical, and Thermal Specification

Data Sheet

Product Features

■

High Performance Processor

— Intel® XScale™ Microarchitecture

— 32 KB Instruction Cache

— 32 KB Data Cache

— 2 KB “mini” Data Cache

— Extensive Data Buffering

Intel® Media Processing Technology

— Enhanced 16-bit Multiply

— 40-bit Accumulator

Flexible Clocking

— CPU clock from 100 to 400 MHz

— Flexible memory clock ratios

— Frequency change modes

Rich Serial Peripheral Set

— AC97 Audio Port

— I

S Audio Port

— USB Client Controller

— High Speed UART

— Second UART with flow control

— UART with hardware flow control

— FIR and SIR infrared comm ports

■

Low Power

— Less than 500 mW Typical Internal

Dissipation

— Supply Voltage may be Reduced to

1.00 V

— Low Power/Sleep Modes

High Performance Memory Controller

— Four Banks of SDRAM - up to 100 MHz

— Five Static Chip Selects

— Support for PCMCIA or Compact Flash

— Companion Chip interface

Additional Peripherals for system

connectivity

— Multimedia Card Controller (MMC)

— SSP Controller

— Network SSP controller for baseband

— I2C Controller

— Two Pulse Width Modulators (PWMs)

— All peripheral pins double as GPIOs

Hardware debug features

Hardware Performance Monitoring features

Order Number: 278805-002

February, 2004

PXA255 Processor — Electrical, Mechanical, and Thermal Specification

Contents

1.0

2.0

3.0

About This Document

............................................................................................ 7

Functional Overview

..............................................................................................7

Package Information

..............................................................................................8

3.1

3.2

4.0

4.1

4.2

4.3

4.4

4.5

4.6

4.7

Package Introduction..................................................................................... 8

3.1.1 Functional Signal Definitions ............................................................8

3.1.1.1 PXA255 Processor Signal Pin Descriptions .....................8

Package Power Ratings ..............................................................................22

Absolute Maximum Ratings......................................................................... 22

Power Consumption Specifications ............................................................. 23

Operating Conditions................................................................................... 25

Targeted DC Specifications......................................................................... 26

Targeted AC Specifications ......................................................................... 27

Oscillator Electrical Specifications............................................................... 28

4.6.1 32.768-kHz Oscillator Specifications .............................................. 28

4.6.2 3.6864 MHz Oscillator Specifications .............................................29

Reset and Power AC Timing Specifications ................................................30

4.7.1 Power-On Timing ...........................................................................30

4.7.2 Hardware Reset Timing.................................................................. 32

4.7.3 Watchdog Reset Timing .................................................................32

4.7.4 GPIO Reset Timing ........................................................................32

4.7.5 Sleep Mode Timing ........................................................................33

Memory Bus and PCMCIA AC Specifications .............................................35

Peripheral Module AC Specifications ..........................................................37

4.9.1 LCD Module AC Timing.................................................................. 37

4.9.2 SSP Module AC Timing.................................................................. 37

4.9.3 Boundary Scan Test Signal Timings .............................................. 38

AC Test Conditions .....................................................................................39

Electrical Specifications

...................................................................................... 22

4.8

4.9

4.10

Data Sheet

PXA255 Processor — Electrical, Mechanical, and Thermal Specification

Figures

Processor Block Diagram...................................................................................... 8

PXA255 processor .............................................................................................. 19

Power-On Reset Timing ...................................................................................... 31

Hardware Reset Timing ...................................................................................... 32

GPIO Reset Timing ............................................................................................. 33

Sleep Mode Timing ............................................................................................. 34

LCD AC Timing Definitions ................................................................................. 37

SSP AC Timing Definitions ................................................................................. 38

AC Test Load ...................................................................................................... 39

Tables

Related Documentation......................................................................................... 7

Processor Pin Types ............................................................................................. 9

Pin and Signal Descriptions for the PXA255 Processor........................................ 9

Pin Description Notes.......................................................................................... 18

PXA255 processor 256-Lead 17x17mm mBGA Pinout — Ballpad No. Order .... 20

and Maximum Power Ratings........................................................................ 22

Absolute Maximum Ratings ................................................................................ 23

Power Consumption Specifications for PXA255 processor ................................ 24

Voltage, Temperature, and Frequency Electrical Specifications......................... 25

Standard Input, Output, and I/O Pin DC Operating Conditions ........................... 26

Standard Input, Output, I/O Pin DC Operating Conditions for 2.5-V Memory ..... 27

Standard Input, Output, and I/O Pin AC Operating Conditions ........................... 28

32.768-kHz Oscillator Specifications................................................................... 28

3.6864-MHz Oscillator Specifications ................................................................. 29

Power-On Timing Specifications ......................................................................... 31

Hardware Reset Timing Specifications ............................................................... 32

GPIO Reset Timing Specifications ...................................................................... 33

Sleep Mode Timing Specifications ...................................................................... 34

SRAM / ROM / Flash / Synchronous Fast Flash AC Specifications.................... 35

Variable Latency I/O Interface AC Specifications ............................................... 35

Card Interface (PCMCIA or Compact Flash) AC Specifications ......................... 36

Synchronous Memory Interface AC Specifications 1 .......................................... 36

LCD AC Timing Specifications ............................................................................ 37

SSP AC Timing Specifications ............................................................................ 38

Boundary Scan Test Signal Timing ..................................................................... 38

Data Sheet

LUPXA255A0C300 Related Products

	LUPXA255A0C300	106RN136P-6B2-18.0	LUPXA255A0C400	890-90-002-20-905
Description	IC micro processor 300mhz 256bga	D Type Connector, 136 Contact(s), Male, Crimp Terminal, Plug	IC micro processor 400mhz 256bga	Board Connector, 2 Contact(s), 1 Row(s), Male, Right Angle, 0.1 inch Pitch, Solder Terminal, Black Insulator, Receptacle
Reach Compliance Code	compli	unknown	unknow	unknown
JESD-609 code	e1	e4	e1	e0
Is it Rohs certified?	conform to	-	conform to	incompatible
Maximum operating temperature	85 °C	-	85 °C	125 °C
Terminal pitch	1 mm	-	1 mm	2.54 mm

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