™
Integrated Voice Chip Sets
VE770 Series
APPLICATIONS
Ideal for Short/Medium Loops of ~2000 ft, 26 AWG, and
5 REN loads
Voice over IP/DSL – Integrated Access Devices, Smart
Residential Gateways, Home Gateway/Router
Cable Telephony – NIU, Set-Top Box, Home Side Box,
Cable Modem, Cable PC
Fiber–Fiber in the Loop (FITL), Fiber to the Home
(FTTH)
■
Wireless Local Loop, Intelligent PBX, ISDN NT1/TA
Le78D11
ORDERING INFORMATION
A
Zarlink
VoSLIC™ device must be used with this part.
Device
LE78D110VC
LE78D110BVC
Package
44-pin TQFP
44-pin TQFP (Green package)*
*Green package meets RoHS Directive 2002/95/EC of the European
Council to minimize the environmental impact of electrical equipment.
FEATURES
Integrated Dual-Channel Chipset
— Switching regulator support
— 44-pin TQFP Package
— 3.3 V Operation
Subscriber Loop Test/Self-Test
— GR-909 compliant drop test capability in both
measurements and pass/fail
– Hazardous Potential
– Foreign Electromotive Force
– Resistive Faults
– Receive off-hook
– Ringers Test
– Loop length
— Real-time automatic line fault detection & reporting
– Loop Supervision
– AC/DC Faults
— Integrated self tests
– Loopback tests
– Checksum of programmed values
µ-law, A-law, ADPCM or linear coding
Industry Standard Interfaces
— PCM/SPI or GCI
World Wide programmability:
— Ringing waveform generation and control
— Two-wire AC impedance
— Trans-hybrid balance with Adaptation
— Gain
— Programmable loop closure/ringtrip thresholds
— Metering Tone Generation
— Call Progress Tones
DTMF Generation AND Detection
FSK/Caller ID Tone Generation -Type I, Type II, & world-
wide
Modem/Fax Tone Detection
Low power dissipation
DESCRIPTION
The
Zarlink
Le78D11 VoSLAC™ device has enhanced and
optimized features to directly address the requirements of
Voice over Broadband (VoB) applications. Their common goal
is to reduce system level cost, board space, and power through
higher levels of integration. In addition, this solution reduces
the total cost of ownership of the end product by promoting
higher quality of service through integrated line and self test
capabilities. The VE770 series chip set uses two devices to
provide a completely software configurable solution to perform
the BORSCHT functions for two lines, including provision of a
single line battery voltage. The resulting system is less
complex, smaller, and denser, yet cost-effective with minimal
external components.
Easy integration into the end application is enabled by the
VoicePath™ API Software. Written in ANSI “C,” the software
development kit reduces the complexity of adding voice into a
product and makes use of the more sophisticated chip set
functions, such as Caller ID. It includes a management tool that
works with the WinSLAC™ Coefficient Generator to easily
support multiple market applications.
BLOCK DIAGRAM
Le77D11 /
Le77D21
T/R
Dual VoSLAC
Voice Signal
Processor
Le78D11
GCI Interface
(GCI)
Tone Detection &
Signal Generation
Dual
VoSLIC /
VoSLIC-
ABS
Line Measurement
PCM Interface and
Time Slot Assigner
(TSA)
PLL Clock
Generator
RELATED LITERATURE
080696 Le77D11 VoSLIC™ Device Data Sheet
080716 Le77D11 /Le78D11 Chip Set User’s Guide
081081 Le71HE0011 Evaluation Board User’s Guide
080729 VoicePath™ API Software Product Brief
080727 WinSLAC™ Software Product Brief
SLIC Interface
(SLI)
T/R
Serial Peripheral
Interface
(MPI)
Document ID#
080697
Date:
Rev:
D
Version:
Distribution:
Public Document
Sep 19, 2007
2
Le78D11
TABLE OF CONTENTS
Data Sheet
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Related Literature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Block Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
PCM Interface and Time Slot Assigner (TSA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Microprocessor Interface (MPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
General Circuit Interface (GCI) Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
PLL Clock Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
SLIC Device Interface (SLI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Line Supervision Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Voice Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Tone Detection and Signal Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Line Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Band Gap Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Environmental Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Electrical Maximum Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
System Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Device DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Transmission Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Transmit and Receive Paths. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Attenuation Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Group Delay Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Gain Linearity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Overload Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Total Distortion Including Quantizing Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Single Frequency Distortion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Intermodulation Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Discrimination Against Out-of-Band Input Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Discrimination Against 12- and 16-kHz Metering Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Spurious Out-of-Band Signals at the Analog Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Switching Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Microprocessor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
PCM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Master Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Chopper Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
GCI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Switching Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Single Channel Application Circuit with the Le77D11 Device. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
Application Circuit Parts List for the Le77D11 Device. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Physical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Revision B1 to C1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Revision C1 to D1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Revision D1 to D2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
2
Zarlink Semiconductor Inc.
Le78D11
LIST OF FIGURES
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Data Sheet
Le78D11 VoSLAC Device Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Transmit Path Attenuation vs. Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Receive Path Attenuation vs. Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Group Delay Distortion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
A-law Gain Linearity with Tone Input (Both Paths) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
µ-law Gain Linearity with Tone Input (Both Paths). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
A/A Overload Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Total Distortion with Tone Input (Both Paths) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Discrimination Against Out-of-Band Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Spurious Out-of-Band Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Microprocessor Interface (Input Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Microprocessor Interface (Output Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
PCM Highway Timing for XE = 0 (Transmit on Negative PCLK Edge) . . . . . . . . . . . . . . . .24
PCM Highway Timing for XE = 1 (Transmit on Positive PCLK Edge) . . . . . . . . . . . . . . . . .25
Master Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Chopper Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Input and Output Waveforms for AC tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
4.096 MHz DCL GCI Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
2.048 MHz DCL GCI Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
3
Zarlink Semiconductor Inc.
Le78D11
PRODUCT DESCRIPTION
Data Sheet
The Le78D11 VoSLAC device contains high performance circuits that provide A/D and D/A conversion for two sets of voice
(codec), loop supervision, and line diagnostic functions. Fixed function DSP resources in the device are used to perform modem
detection, DTMF detection, ADPCM voice compression, and echo cancellation. Although the device offers a high degree of
programmability, the available WinSLAC and VoicePath™ software packages allow the user to easily configure and control the
Voice Line Circuits (VLC) and the programmable filter coefficients and loop supervision data are easily calculated.
The main functions that can be observed and controlled through the Le78D11 VoSLAC device are:
•
•
•
•
•
•
•
•
•
•
•
Off Hook detection
Ring trip detection
Line Fault Indication
Ground Key detection
DTMF detection
Fax and Modem tone (1100 Hz and 2100 Hz) detection
DC Loop Current Limit
Ring Generation
Subscriber line impedance matching
Metering Signal Generation
Line Circuit test
In order for the Le78D11 VoSLAC device to accomplish the above functions, it must receive input from the
Zarlink
Le77D11
devices, which sense the following parameters and scale them appropriately for the Le78D11 VoSLAC device:
•
•
•
•
•
V
IN
: A metallic AC voltage that is proportional to the upstream AC loop current
I
MT
: A current that is proportional to the DC + AC loop current
F: A logic Low indicates a fault or ground key condition
V
DC
: DC loop current limit threshold control voltage
V
OUT
: Downstream voice and low level metering signals or internal ringing or test signals
The Le78D11 VoSLAC device then outputs the following to the Le77D11 SLIC device:
The Le78D11 device performs the codec and filter functions associated with the 4-wire section of the subscriber line circuitry in
a digital switch. These functions involve converting an analog voice signal into digital PCM samples and converting digital PCM
samples back into an analog signal. During conversion, digital filters are used to band-limit the voice signals. The user
programmable filters set the receive and transmit gain, perform the transhybrid balancing function, permit adjustment of the 2-
wire termination impedance, and provide frequency distortion adjustment (equalization) of the receive and transmit paths. An
Adaptive Transhybrid Balance filter is included that allows the Le78D11 VoSLAC device to dynamically adjust to changing line
conditions minimizing objectionable echo. All programmable digital filter coefficients can be calculated using WinSLAC software.
The PCM codes can be either 16-bit linear two's complement, 8-bit companded A-law or µ-law, or 32 kbit/s or 24 kbit/s ADPCM.
4
Zarlink Semiconductor Inc.
Le78D11
BLOCK DESCRIPTIONS
Figure 1.
Le78D11 VoSLAC Device Block Diagram
Tone Detection
& Signal
Generation
Line
Measurement
Data Sheet
VIN
1
VOUT
1
Voice Signal Processing
Channel 1
VIN
2
VOUT
2
Voice Signal Processing
Channel 2
Tone Detection
& Signal
Generation
IMT
1
IMT
2
F
1
VA
1
VB
1
VS
1
GCI Interface
(GCI)
Line Supervision
Processing
PLL Clock
Generator
MCLK
F
2
VA
2
VB
2
VS
2
PCM Interface
and Time Slot
Assigner
(TSA)
PCLK/FSC
FS/DCL
DRA/DD
DXA/DU
TSCA/G
DCLK/S 0
CS
DIN/S1
INT/S2
DOUT
RST
VREF
IREF
VDC
1
C3
1
C2
1
C1
1
VDC
2
C3
2
C2
2
C1
2
CHCLK
SLIC Interface
(SLI)
Microprocessor
Interface
(MPI)
Band Gap
Voltage
Reference
The following provides an overview of the functions of the Le78D11 VoSLAC device. Detailed descriptions and command sets
are provided in the
Le77D11/Le78D11 Chip Set User’s Guide
(document ID# 080716).
The Le78D11 VoSLAC device supports two digital interface modes: (1) PCM/MPI, where voice and control data are carried over
separate serial interfaces, and (2) GCI, where the voice and control data are combined onto a single serial bus. The two modes
are exclusive and the associated pins have dual functions. The naming convention for the pins lists the PCM/MPI interface
function first then the GCI function.
PCM Interface and Time Slot Assigner (TSA)
The Le78D11 VoSLAC device powers up in PCM/MPI mode. If a signal is detected on PCLK (PCM Clock) and FS (Frame Sync)
is toggling at a slower rate, the PCM interface and time slot assigner functions are maintained. This block uses five signals: PCLK,
FS, DXA, DRA and TSCA.
The PCM Interface is a synchronous serial mode of communication between the system and the Le78D11 VoSLAC device for
exchanging the encoded voice signals on a “PCM highway”. This highway uses FS as a nominally 8kHz synchronization (frame)
reference and PCLK as a data strobe that determines the rate at which the data is shifted out of the DXA pin and into the DRA
pin. The Le78D11 VoSLAC device transmits/ receives either 8-bits of (A-law/µ-law) compressed voice data, 4bits of 32 kb/s
ADPCM data, 3 bits of 24 kb/s ADPCM data, or 16-bits of linear two's complement voice data every frame. The PCLK frequency
can be any multiple of the FS frequency from 128 kHz to 8.192 MHz for compressed data, and from 256 kHz to 8.192 MHz for
linear data. The position of the data within the frame is controlled by the TSA and determined by a combination of three
programmable variables. The first is the Transmit and Receive Clock Slot Register which allows setting from 0 to 7 PCLK periods
of clock skew in the system. The second is the XE bit, also in the Transmit and Receive Clock Slot Register, which selects the
clock edge used for transmitting or receiving data. Finally, the Transmit and Receive Timeslot Register allows the data for each
channel to be offset within a frame by 8 bit increments or timeslots.
Microprocessor Interface (MPI)
The Le78D11 VoSLAC device Microprocessor Interface (MPI) is used in conjunction with PCM operation. It is a simple
synchronous serial interface. It consists of six signals: reset (RST), serial data in (DIN), serial data out (DOUT), data clock
(DCLK), a chip select (CS) and an Interrupt (INT). The serial input consists of 8-bit commands sent by the external controller to
the Le78D11 VoSLAC device that can be followed with additional bytes of input data or can be followed by the Le78D11 VoSLAC
device sending out bytes of data. All data input and output is MSB (D7) first and LSB (D0) last. All data bits are shifted in/out with
respect to the DCLK while CS is Low. The MPI will not accept a command or data byte of less than 8 bits; if more than 8 bits are
5
Zarlink Semiconductor Inc.
MCU
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EEWORLD
