STA015
MPEG 2.5 LAYER III AUDIO DECODER
WITH ADPCM CAPABILITY
SINGLE CHIP MPEG2 LAYER 3 DECODER
SUPPORTING:
– All features specified for Layer III in ISO/IEC
11172-3 (MPEG 1 Audio)
– All features specified for Layer III in ISO/IEC
13818-3.2 (MPEG 2 Audio)
– Lower sampling frequencies syntax exten-
sion, (not specified by ISO) called MPEG 2.5
DECODES LAYER III STEREO CHANNELS,
DUAL CHANNEL, SINGLE CHANNEL (MONO)
SUPPORTING ALL THE MPEG 1 & 2
SAMPLING FREQUENCIES AND THE
EXTENSION TO MPEG 2.5:
48, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz
ACCEPTS MPEG 2.5 LAYER III
ELEMENTARY COMPRESSED BITSTREAM
WITH DATA RATE FROM 8 Kbit/s UP TO 320
Kbit/s
ADPCM CODEC CAPABILITIES:
– sample frequency from 8 kHz to 32 kHz
– sample size from 8 bits to 32 bits
– encoding algorithm: DVI,
ITU-G726 pack (G723-24, G721,G723-40)
– Tone control and fast-forward capability
EASY PROGRAMMABLE GPSO INTERFACE
FOR ENCODED DATA UP TO 5Mbit/s
(TQFP44 & LFBGA 64)
DIGITAL VOLUME CONTROL
DIGITAL BASS & TREBLE CONTROL
BYPASS MODE FOR EXTERNAL AUDIO
SOURCE
SERIAL BITSTREAM INPUT INTERFACE
EASY PROGRAMMABLE ADC INPUT
INTERFACE
ANCILLARY DATA EXTRACTION VIA I
2
C
INTERFACE.
SERIAL PCM OUTPUT INTERFACE (I
2
S AND
OTHER FORMATS)
PLL FOR INTERNAL CLOCK AND FOR
OUTPUT PCM CLOCK GENERATION
CRC CHECK AND SYNCHRONISATION
ERROR DETECTION WITH SOFTWARE
SO28
TQFP44
LFBGA64
ORDERING NUMBER:
STA015$ (SO28)
STA015T$ (TQFP44)
STA015B$ (LFBGA 8x8)
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April 2010
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DESCRIPTION
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INDICATORS
I
2
C CONTROL BUS
LOW POWER 2.4V CMOS TECHNOLOGY
WIDE RANGE OF EXTERNAL CRYSTALS
FREQUENCIES SUPPORTED
APPLICATIONS
PC SOUND CARDS
MULTIMEDIA PLAYERS
VOICE RECORDERS
The STA015 is a fully integrated high flexibility
MPEG Layer III Audio Decoder, capable of decod-
ing Layer III compressed elementary streams, as
specified in MPEG 1 and MPEG 2 ISO standards.
The device decodes also elementary streams
compressed by using low sampling rates, as spec-
ified by MPEG 2.5. STA015 receives the input
data through a Serial input Interface. The decoded
signal is a stereo, mono, or dual channel digital
output that can be sent directly to a D/A converter,
by the PCM Output Interface.
This interface is software programmable to adapt
the STA015 digital output to the most common
DACs architectures used on the market. The func-
tional STA015 chip partitioning is described in
Fig.1a and Fig.1b.
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STA015
1.0 OVERVIEW
1.1 MP3 decoder engine
The MP3 decoder engine is able to decode any Layer III compliant bitstream: MPEG1, MPEG2 and
MPEG2.5 streams are supported. Besides audio data decoding the MP3 engine also performs ANCIL-
LARY data extraction: these data can be retrieved via I
2
C bus by the application microcontroller in order
to implement specific functions.
Decoded audio data goes through a software volume control and a two-band equalizer blocks before feed-
ing the output I2S interface. This results in no need for an external audio processor.
MP3 bitstream is sent to the decoder using a simple serial input interface (see pins SDI, SCKR, BIT_EN
and DATA_REQ), supporting input rate up to 20 Mbit/s. Received data are stored in a 256 bytes long input
buffer which provides a feedback line (see DATA_REQ pin) to the bitstream source (tipically an MCU).
1.2 ADPCM encoder/decoder engine
This device also embeds a multistandard ADPCM encoder/decoder supporting different sample rates
(from 8 KHz up to 32 KHz) and different sample sizes (from 8 bit to 32 bits).
During encoding process two different interfaces can be used to feed data: the serial input interface (same
interface used also to feed MP3 bitstream) or the ADC input interface, which provides a seamless con-
nection with an external A/D converter. The currently used interface is selected via I
2
C bus.
Also to retrieve encoded data two different interfaces are available: the I
2
C bus or the faster GPSO output
interface. GPSO interface is able to output data with a bitrate up to 5 Mbit/s and its control pins
(GPSO_SCKR, GPSO_DATA and GPSO_REQ) can be configured in order to easily fit the target applica-
tion.
1.3 BYPASS functional mode
In order to allow using the device to post-process auxiliary audio sources a special BYPASS mode is avail-
able. When the device is configured in BYPASS mode the embedded DSP will process digital audio data
coming through the ADC input interface and will output the resulting data to the external DAC.
Available processings include volume and a tone ontrols.
THERMAL DATA
Symbol
Rth j-amb
Parameter
Thermal resistance Junction to Ambient
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DD
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V
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T
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Power Supply
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(s
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Value
85
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Unit
°C/W
Parameter
Value
-0.3 to 4
-0.3 to V
DD
+0.3
-0.3 to V
DD
+0.3
-40 to +150
-20 to +85
Unit
V
V
V
°C
°C
Voltage on Input pins
Voltage on output pins
Storage Temperature
Operative ambient temp
oper
4/56
ARM Technology
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