EEWORLDEEWORLDEEWORLD

Part Number

Search

Q20.0-JXS21-10-10/20-T2--FU-WA-LF

Description
Parallel - Fundamental Quartz Crystal, 20MHz Nom, SMD, 4 PIN
CategoryPassive components    Crystal/resonator   
File Size2MB,2 Pages
ManufacturerJauch
Websitehttp://www.jauchusa.com/
Environmental Compliance
Download Datasheet Parametric View All

Q20.0-JXS21-10-10/20-T2--FU-WA-LF Overview

Parallel - Fundamental Quartz Crystal, 20MHz Nom, SMD, 4 PIN

Q20.0-JXS21-10-10/20-T2--FU-WA-LF Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid145135864938
package instructionSMD, 4 PIN
Reach Compliance Codecompliant
YTEOL7.25
Other featuresAT CUT
Ageing1 PPM/FIRST YEAR
Crystal/Resonator TypePARALLEL - FUNDAMENTAL
Drive level10 µW
frequency stability0.002%
frequency tolerance10 ppm
JESD-609 codee4
load capacitance10 pF
Installation featuresSURFACE MOUNT
Nominal operating frequency20 MHz
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
physical size2.0mm X 1.6mm X 0.55mm
Series resistance60 Ω
surface mountYES
Terminal surfaceGold (Au) - with Nickel (Ni) barrier
SMD Quartz Crystal · JXS21-WA
- for wireless applications, 2.0 x 1.6 mm
- perfect reference crystal for wireless applications
- for IoT using BlueTooth, ZigBee, NFC and more
- high frequency stability and low ESR
- metal lid allows EMI shielding
2011/65/EC
RoHS
RoHS compliant
Pb free
actual size
REACH
compliant
Conflict
mineral free
GENERAL DATA
TYPE
special frequencies for
wireless applications
frequency tolerance at 25 °C
load capacitance C
L
shunt capacitance C
O
storage temperature
drive level max.
aging
JXS21-WA
14 standard frequencies shown in ESR list
(for other frequencies refer to general
JXS21 datasheet)
±10 ppm*
8 pF / 9 pF / 10 pF / 12 pF*
< 3 pF
-40 °C ~ +105 °C
100 μW (10 μW recommended)
< ± 1 ppm first year
ESR (SERIES RESISTANCE RS)
frequency
in MHz
16.0
19.20
20.0
24.0
25.0
26.0
27.120
30.0
32.0
37.40
±15
ppm
vibration
mode
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
fund. - AT
ESR max.
in ½
120
120
100
80
60
60
60
60
50
50
50
50
50
50
ESR typ.
in ½
80
80
60
40
30
25
25
25
25
25
25
25
20
20
* for different specs please ask for availability
TABLE 1: FREQUENCY STABILITY CODE
± 10
ppm
±13
ppm
±20
ppm
±25
ppm
±30
ppm
38.40
40.0
48.0
52.0
-20 °C ~ +70 °C STD.
-30 °C ~ +85 °C T(-30/+85)
-40 °C ~ +85 °C T1
-40 °C ~ +105 °C T2
standard
available ∆ ask if available
DIMENSIONS
2.0
±0.1
#4
#3
1.6
±0.1
0.55 max.
#3
0.47
±0.05
0.64
±0.05
#4
#4
#3
1.1
±0.1
0.8
±0.1
1.4
±0.1
0.9
±0.1
0.50
±0.05
#1
#2
#2
#1
0.60
±0.05
top view
ORDER INFORMATION
side view
bottom view
#2–#4: connected to lid,
preferably connect to GND
crystal connection
#1
#2
pad layout
in mm
Q
Quartz
frequency
see frequencies
in ESR list
type
JXS21
load capacitance
8 / 9 / 10 / 12 pF
tolerance at
25 °C
10 = ±10 ppm std.
stability vs.
temp. range
10 = ±10 ppm
13 = ±13 ppm
15 = ±15 ppm
20 = ±20 ppm
25 = ±25 ppm
30 = ±30 ppm
option 1
blank =
T(-30/+85) =
T1 =
T2 =
FU =
option 2
-20 °C ~ +70 °C
WA = for wireless
-30 °C ~ +85 °C
application
-40 °C ~ +85 °C
-40 °C ~ +105 °C
for fundamental
frequencies ≥ 20 MHz
Example: Q 26.0-JXS21-12-10/15-T1-FU-WA-LF
(Suffix LF = RoHS compliant / Pb free pins or pads)
03042019-18
Jauch Quartz GmbH • e-mail: info@jauch.com • full data can bedata can be found under:
info@jauch.de
full found under: www.jauch.com
All specifications are subject to change without notice
www.jauch.de | www.jauch.co.uk | www.jauch.fr | www.jauchusa.com
[Sipeed LicheeRV 86 Panel Review] 2- Board Resource Introduction and Data Collection
Board Resource Introduction Lichee RV-86 is a smart home central control development kit that is compatible with Lichee RV-Nezha CM. Supports WAFT (WebAssembly Framework For Things) development enviro...
DDZZ669 Domestic Chip Exchange
EEWORLD University ---- HELLO FPGA - Digital Circuits
HELLO FPGA - Digital Circuits : https://training.eeworld.com.cn/course/3685...
锆石科技 FPGA/CPLD
How does Xilinx encrypt source code?
How does Xilinx encrypt the source code so that part of the .v file is visible and debugged, and the other part of the .v file is encrypted, so that the whole can be used in combination. Can I use the...
eeleader FPGA/CPLD
How to learn microcontroller hardware?
I have a microcontroller test box, but I have only run programs on it. The peripherals are all set up in the routines. But recently I want to learn about hardware knowledge. I think it is a bit too bi...
z4126 Embedded System
An idea for judging serial port receiving timeout
Some friends asked about the processing of serial port receiving timeout. Here is a brief explanation. Taking 51 as an example, only one idea is provided for reference. Question: The serial port recei...
btiger2000 MCU
[Award Ceremony] ADI Prize Download Activity 2 Solar Photovoltaic Power Generation Solutions
Activity details: >>[b][size=6][color=#ff0000][color=#535353][url=https://www.eeworld.com.cn/huodong/SolarEnergy/]Download Solar Photovoltaic Power Generation Solutions[/url][/color][/color][/size][/b...
EEWORLD社区 ADI Reference Circuit

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1803  1611  2144  2657  2462  37  33  44  54  50 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号