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KMPC8347CZQAGDB

Description
IC mpu pwrquicc II 620pbga
Categorysemiconductor    The embedded processor and controller   
File Size1MB,102 Pages
ManufacturerFREESCALE (NXP)
Environmental Compliance  
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IC mpu pwrquicc II 620pbga

KMPC8347CZQAGDB Parametric

Parameter NameAttribute value
Datasheets
MPC8347(E) Ref Manual
Product Photos
620-BBGA Exp
Standard Package2
CategoryIntegrated Circuits (ICs)
FamilyEmbedded - Microprocessors
PackagingTray
Core ProcessPowerPC e300
Number of Cores/Bus Width1 Core, 32-Bi
Speed266MHz
Co-Processors/DSP-
RAM ControllersDDR
Graphics AcceleratiN
Display & Interface Controllers-
Etherne10/100/1000 Mbps (2)
SATA-
USBUSB 2.0 + PHY (2)
Voltage - I/O2.5V, 3.3V
Operating Temperature-40°C ~ 105°C
Security Features-
Package / Case620-BBGA Exposed Pad
Supplier Device Package620-PBGA (29x29)
Additional InterfacesDUART, I²C, PCI, SPI
Freescale Semiconductor
Technical Data
Document Number: MPC8347EEC
Rev. 11, 02/2009
MPC8347E PowerQUICC™ II Pro
Integrated Host Processor Hardware
Specifications
The MPC8347E PowerQUICC™ II Pro is a next generation
PowerQUICC II integrated host processor. The MPC8347E
contains a PowerPC™ processor core built on Power
Architecture™ technology with system logic for
networking, storage, and general-purpose embedded
applications. For functional characteristics of the processor,
refer to the
MPC8349E PowerQUICC™ II Pro Integrated
Host Processor Family Reference Manual.
To locate published errata or updates for this document, refer
to the MPC8347E product summary page on our website
listed on the back cover of this document or, contact your
local Freescale sales office.
NOTE
The information in this document is accurate for
revision 1.1 silicon and earlier. For information on
revision 3.0 silicon and later versions (for orderable
part numbers ending in A or B), see the
MPC8347EA PowerQUICC™ II Pro Integrated
Host Processor Hardware Specifications.
See
Section 23.1, “Part Numbers Fully Addressed
by This Document,”
for silicon revision level
determination.
Contents
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . 7
Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 10
Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 12
RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 13
DDR SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Ethernet: Three-Speed Ethernet, MII Management . 22
USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
I
2
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
IPIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . 55
Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
System Design Information . . . . . . . . . . . . . . . . . . . 91
Document Revision History . . . . . . . . . . . . . . . . . . . 95
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 98
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© Freescale Semiconductor, Inc., 2005–2009. All rights reserved.
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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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