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MT8960AE1

Description
IC codec ico-2cmos 18dip
CategoryWireless rf/communication    Telecom circuit   
File Size482KB,31 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Environmental Compliance
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MT8960AE1 Overview

IC codec ico-2cmos 18dip

MT8960AE1 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerMicrosemi
Parts packaging codeDIP
package instructionDIP,
Contacts18
Reach Compliance Codecompli
Law of compression and extensionMU-LAW
filterYES
JESD-30 codeR-PDIP-T18
JESD-609 codee3
length22.86 mm
Negative supply voltage rating-5 V
Number of functions1
Number of terminals18
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height5.33 mm
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Telecom integrated circuit typesPCM CODEC
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
ISO
2
-CMOS
MT8960/61/62/63/64/65/66/67
Integrated PCM Filter Codec
Data Sheet
Features
ST-BUS compatible
Transmit/Receive filters & PCM Codec in one I.C
Meets AT&T D3/D4 and CCITT G711 and G712
µ-Law:
MT8960/62/64/67
A-Law: MT8961/63/65/67
Low power consumption:
Op.: 30 mW typ.
Stby.: 2.5 mW typ.
Digital Coding Options:
MT8964/65/66/67 CCITT Code
MT8960/61/62/63 Alternative Code
Digitally controlled gain adjust of both filters
Analog and digital loopback
Filters and codec independently user accessible
for testing
Powerdown mode available
2.048 MHz master clock input
Up to six uncommitted control outputs
±5
V
±5%
power supply
Ordering Information
MT8960/61/64/65AE
MT8962/63AE
MT8962/63/66/67AS
MT8963/66ASR
MT8960/64/65AE1
MT8961AE1
MT8962ASR1
MT8962/63AE1
MT8962/66AS1
MT8963AS1
MT8963ASR1
MT8967AS1
MT8966/67ASR1
18
20
20
20
18
18
20
20
20
20
20
20
20
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
PDIP
PDIP
SOIC
SOIC
PDIP*
PDIP*
SOIC*
PDIP*
SOIC*
SOIC*
SOIC*
SOIC*
SOIC*
November 2005
Tubes
Tubes
Tubes
Tape &
Tubes
Tubes
Tape &
Tubes
Tubes
Tubes
Tape &
Tubes
Tape &
Reel
Reel
Reel
Reel
*Pb Free Matte Tin
-40°C to +85°C
Description
Manufactured in ISO
2
-CMOS, these integrated
filter/codecs are designed to meet the demanding
performance needs of the digital telecommunications
industry, e.g., PABX, Central Office, Digital telephones.
ANUL
V
X
Transmit
Filter
Analog to
Digital PCM
Encoder
Output
Register
DSTo
SD0
SD1
SD2
SD3
SD4
SD5
Output
Register
A Register
8-Bits
CSTi
CA
Control
Logic
F1i
C2i
B-Register
8-Bits
V
R
Receive
Filter
PCM Digital
to Analog
Decoder
Input
Register
DSTi
V
Ref
GNDA
GNDD
V
DD
V
EE
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.
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