Features
•
•
•
•
•
•
•
•
Wide Operating Voltage Range: 2V to 16V
Low Current Consumption: 2.7 mA Typically
Chip Disable Input to Power Down the Integrated Circuit
Low Power-down Quiescent Current
Drives a Wide Range of Speaker Loads
Output Power P
o
= 250 mW at R
L
= 32Ω (Speaker)
Low Harmonic Distortion (0.5% Typically)
Wide Gain Range: 0 dB to 46 dB
Benefits
•
Low Number of External Components
•
Low Current Consumption
1. Description
The integrated circuit U4083B is a low-power audio amplifier for telephone loudspeak-
ers. It has differential speaker outputs to maximize the output swing at low supply
voltages. There is no need for coupler capacitors. The U4083B has an open-loop gain
of 80 dB where the closed-loop gain is adjusted with two external resistors. A chip dis-
able pin permits powering down and/or muting the input signal.
Figure 1-1.
Block Diagram
Low-power
Audio Amplifier
for Telephone
Applications
U4083B
6
Vi
FC3
4
3
Amp1
4k
4k
5
VS
VO1
50k
FC2
2
50k
125k
Amp2
8
VO2
U4083B
Bias circuit
7
GND
1
CD
Rev. 4655C–CORD–03/06
2. Pin Configuration
Figure 2-1.
Pinning SO8
CD
1
8
VO2
FC2
2
7
GND
FC1
3
6
V
S
V
i
4
5
VO1
Table 2-1.
Pin
1
2
3
4
5
6
7
8
Pin Description
Symbol
CD
FC2
FC1
V
i
VO1
V
S
GND
VO2
Function
Chip disable
Filtering, power supply rejection
Filtering, power supply rejection
Amplifier input
Amplifier output 1
Voltage supply
Ground
Amplifier output 2
2
U4083B
4655C–CORD–03/06
U4083B
3. Functional Description Including External Circuitry
3.1
Pin 1: Chip Disable Digital Input (CD)
Pin 1 (chip disable) is used to power down the IC to conserve power or mute the IC or both.
Input impedance at Pin 1 is typically 90 kΩ.
• Logic 0 < 0.8V
• Logic 1 > 2V
IC enabled (normal operation)
IC disabled
Figure 8-15 on page 12
shows the power supply current diagram. The change in differential gain
from normal operation to muted operation (muting) is more than 70 dB.
Switching characteristics are as follows:
• Turn-on time
• Turn-off time
t
on
= 12 ms to 15 ms
t
off
≤
2 µs
They are independent of C
1
, C
2
and V
S
.
Voltages at Pins 2 and 3 are supplied from V
S
and, therefore, do not change when the U4083B
is disabled. The outputs, V
O1
(Pin 5) and V
O2
(Pin 8), turn to a high impedance condition by
removing the signal from the speaker.
When signals are applied from an external source to the outputs (disabled), they must not
exceed the range between the supply voltage, V
S
, and ground.
3.2
Pins 2 and 3: Filtering, Power Supply Rejection
Power supply rejection is provided by capacitors C
1
and C
2
at Pin 3 and Pin 2, respectively. C
1
is
dominant at high frequencies whereas C
2
is dominant at low frequencies (Figure
8-4 on page 8
to
Figure 8-7 on page 9).
The values of C
1
and C
2
depend on the conditions of each application.
For example, a line-powered speakerphone (telephone amplifier) will require more filtering than
a system powered by regulated power supply.
The amount of rejection is a function of the capacitors and the equivalent impedance at Pin 3
and Pin 2 (see electrical characteristic equivalent resistance, R).
Apart from filtering, capacitors C
1
and C
2
also influence the turn-on time of the circuit at power
up, since the capacitors are charged up through the internal resistors (50 kΩ and 125 kΩ) as
shown in the block diagram.
Figure 8-1 on page 7
shows the turn-on time versus C
2
at V
S
= 6V, for two different C
1
values.
The turn-on time is 60% longer when V
S
= 3V and 20% shorter when V
S
= 9V.
The turn-off time is less than 10 µs.
3
4655C–CORD–03/06
3.3
Pin 4: Amplifier Input V
i
,
Pin 5: Amplifier Output 1 V
O1
,
Pin 8: Amplifier Output 2 V
O2
There are two identical operational amplifiers. Amplifier 1 has an open-loop gain
≥
80 dB at
100Hz (Figure
8-2 on page 7),
whereas the closed-loop gain is set by external resistors, R
f
and
R
i
(Figure
8-3 on page 8).
The amplifier is unity gain stable, and has a unity gain frequency of
approximately 1.5 MHz. A closed-loop gain of 46 dB is recommended for a frequency range of
300Hz to 3400Hz (voice band). Amplifier 2 is internally set to a gain of –1.0 dB (0 dB). The out-
puts of both amplifiers are capable of sourcing and sinking a peak current of 200 mA. Output
voltage swing is between 0.4V and V
S
– 1.3V at maximum current (Figure
8-18 on page 13
and
Figure 8-19 on page 13).
The output DC offset voltage between Pins 5 and 8 (V
O1
– V
O2
) is mainly a function of the feed-
back resistor, R
f
, because the input offset voltages of the two amplifiers neutralize each other.
Bias current of Amplifier 1 which is constant with respect to V
s
, flows out of Pin 4 (V
i
) and
through R
f
, forcing V
O1
to shift negative by an amount equal to R
f
I
IB
and V
O2
positive to an equal
amount.
The output offset voltage specified in the electrical characteristics is measured with the feedback
resistor (R
f
= 75 kΩ) shown in the typical application circuit,
Figure 8-20 on page 14.
It takes into
account the bias current as well as internal offset voltages of the amplifiers.
3.4
Pin 6: Supply and Power Dissipation
Power dissipation is shown in
Figure 8-8 on page 9
to
Figure 8-10 on page 10
for different loads.
Distortion characteristics are given in
Figure 8-11 on page 10
to
Figure 8-13 on page 11.
T
jmax
–
T
amb
P
totmax
= --------------------------------
-
R
thJA
where
T
jmax
= Junction temperature = 140°C
T
amb
= Ambient temperature
R
thJA
= Thermal resistance, junction-ambient
Power dissipated within the IC in a given application is found from the following equation:
P
tot
= (V
S
×
I
S
) + (I
RMS
×
V
S
) – (R
L
×
I
RMS2
)
I
S
is obtained from
Figure 8-15 on page 12.
I
RMS
is the RMS current at the load R
L
.
The IC's operating range is defined by a peak operating load current of ±200 mA (Figure
8-8 on
page 9
to
Figure 8-13 on page 11).
It is further specified with respect to different loads (see
Fig-
ure 8-14 on page 12).
The left (ascending) portion of each of the three curves is defined by the
power level at which 10% distortion occurs. The center flat portion of each curve is defined by
the maximum output current capability of the integrated circuit. The right (descending) portion of
each curve is defined by the maximum internal power dissipation of the IC at 25°C. At higher
ambient temperatures, the maximum load power must be reduced according to the above men-
tioned equation.
4
U4083B
4655C–CORD–03/06
U4083B
3.5
Layout Considerations
Normally, a snubber is not needed at the output of the IC, unlike many other audio amplifiers.
However, the PC-board layout, stray capacitances, and the manner in which the speaker wires
are configured may dictate otherwise. Generally, the speaker wires should be twisted tightly,
and should not be more than a few cm (or inches) in length.
4. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Reference point pin 7, T
amb
= 25° C unless otherwise specified.
Parameters
Supply voltage
Voltages
Disabled
Output current
Junction temperature
Storage temperature range
Ambient temperature range
Power dissipation SO8: T
amb
= 60°C
Pin 6
Pins 1, 2, 3 and 4
Pins 5 and 8
Pins 5 and 8
T
j
T
stg
T
amb
P
tot
Symbol
V
S
Value
Unit
V
V
V
mA
°C
°C
°C
mW
–
1.0 to +18
–
1.0 to (V
S
+ 1.0)
–
1.0 to (V
S
+ 1.0)
±250
+140
–
55 to +150
–
20 to +70
440
5. Thermal Resistance
Parameters
Junction ambient
SO8
Symbol
R
thJA
Value
180
Unit
K/W
6. Recommended Operating Conditions
Parameters
Supply voltage
Load impedance
Load current
Differential gain (5.0 kHz bandwidth)
Voltage at CD
Ambient temperature range
Pin 1
Pin 6
Pins 5 to 8
Symbol
V
S
R
L
I
L
DG
V
CD
T
amb
Value
2 to 16
8.0 to 100
±200
0 to 46
V
S
Unit
V
Ω
mA
dB
V
°C
–
20 to +70
5
4655C–CORD–03/06
京公网安备 11010802033920号
EEWORLD
