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MT28F400B5WG-8 BET TR

Description
IC flash 4mbit 80ns 48tsop
Categorystorage   
File Size312KB,32 Pages
ManufacturerMicron
Websitehttp://www.micron.com/
Download Datasheet Parametric View All

MT28F400B5WG-8 BET TR Overview

IC flash 4mbit 80ns 48tsop

MT28F400B5WG-8 BET TR Parametric

Parameter NameAttribute value
Datasheets
MT28F004B5, 400B5
Product Photos
MT29F4G-48TSOP
Standard Package1,000
CategoryIntegrated Circuits (ICs)
FamilyMemory
PackagingTape & Reel (TR)
Format - MemoryFLASH
Memory TypeFLASH - NOR
Memory Size4M (512K x 8, 256K x 16)
Speed80ns
InterfaceParallel
Voltage - Supply4.5 V ~ 5.5 V
Operating Temperature-40°C ~ 85°C
Package / Case48-TFSOP (0.724", 18.40mm Width)
Supplier Device Package48-TSOP I
4Mb
SMART 5 BOOT BLOCK FLASH MEMORY
FLASH MEMORY
FEATURES
• Seven erase blocks:
16KB/8K-word boot block (protected)
Two 8KB/4K-word parameter blocks
Four main memory blocks
• Smart 5 technology (B5):
5V ±10% V
CC
5V ±10% V
PP
application/production
programming
1
• Advanced 0.18µm CMOS floating-gate process
• Compatible with 0.3µm Smart 5 device
• Address access time: 80ns
• 100,000 ERASE cycles
• Industry-standard pinouts
• Inputs and outputs are fully TTL-compatible
• Automated write and erase algorithm
• Two-cycle WRITE/ERASE sequence
• Byte- or word-wide READ and WRITE
(MT28F400B5, 256K x 16/512K x 8)
• Byte-wide READ and WRITE only
(MT28F004B5, 512K x 8)
TSOP and SOP packaging options
MT28F004B5
MT28F400B5
5V Only, Dual Supply (Smart 5)
0.18µm Process Technology
40-Pin TSOP Type I
48-Pin TSOP Type I
44-Pin SOP
2
GENERAL DESCRIPTION
The MT28F004B5 (x8) and MT28F400B5 (x16, x8)
are nonvolatile, electrically block-erasable (Flash),
programmable, read-only memories containing
4,194,304 bits organized as 262,144 words (16 bits) or
524,288 bytes (8 bits). Writing or erasing the device is
done with a 5V V
PP
voltage, while all operations are
performed with a 5V V
CC
. Due to process technology
advances, 5V V
PP
is optimal for application and pro-
duction programming. These devices are fabricated
with Micron’s advanced 0.18µm CMOS floating-gate
process.
The MT28F004B5 and MT28F400B5 are organized
into seven separately erasable blocks. To ensure that
critical firmware is protected from accidental erasure
or overwrite, the devices feature a hardware-protected
boot block. Writing or erasing the boot block requires
either applying a super-voltage to the RP# pin or driv-
ing WP# HIGH in addition to executing the normal
write or erase sequences. This block may be used to
store code implemented in low-level system recovery.
The remaining blocks vary in density and are written
and erased with no additional security measures.
Please refer to Micron’s Web site (www.micron.com/
flash)
for the latest data sheet.
OPTIONS
• Timing
80ns access
• Configurations
512K x 8
256K x 16/512K x 8
• Boot Block Starting Word Address
Top (3FFFFh)
Bottom (00000h)
• Operating Temperature Range
Extended (-40ºC to +85ºC)
• Packages
MT28F004B5
Plastic 40-pin (standard) TSOP Type I
Plastic 40-pin (lead free) TSOP Type I
MT28F400B5
Plastic 48-pin (standard) TSOP Type I
Plastic 48-pin (lead free) TSOP Type I
Plastic 44-pin (standard) SOP
Plastic 44-pin (lead free) SOP
Notes:
MARKING
-8
MT28F004B5
MT28F400B5
T
B
ET
VG
VP
WG
WP
SG
2
SP
2
1.
This generation of devices does not support 12V V
PP
compatibility production programming; however, 5V
V
PP
application production programming can be used
with no loss of performance.
2.
Contact factory for availability.
Part Number Example:
MT28F400B5WG-8 T
09005aef8075d1f1
MT28F004B5.fm - Rev. 4, Pub. 2/2004
1
©2002 Micron Technology, Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.
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