Voltage on HS (Note 2) . . . . . . . . . .(Repetitive Transient) -1V to 80V
Voltage on HB . . . . . . . . . . . . . . . . . . . . . . . . . . V
HS
+7.5V to V
HS
+V
DD
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the recommended operating conditions of this specification is not implied.
NOTES:
1. All voltages referenced to V
SS
unless otherwise specified.
2. Based on V
DD
=15V. The magnitude of the allowable negative transient on the HS pin is a function of the V
DD
supply voltage. V
HS
<15.6V-
V
DD
+V
F
, where V
HS
is the magnitude of the allowable negative transient and V
F
is the forward voltage drop of the bootstrap diode.
3.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
JC
, the
“case temp” is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications
V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, Unless Otherwise Specified
T
J
= 25°C
T
J
= -40°C TO
125°C
MAX
MIN
MAX
UNITS
PARAMETERS
SYMBOL
TEST CONDITIONS
MIN
TYP
SUPPLY CURRENTS & UNDERVOLTAGE PROTECTION
V
DD
Quiescent Current
V
DD
Operating Current
V
DD
Operating Current
HB Off Quiescent Current
HB On Quiescent Current
HB Operating Current
HB Operating Current
HS Leakage Current
V
DD
Rising Undervoltage Threshold
V
DD
Falling Undervoltage Threshold
Undervoltage Hysteresis
HB Undervoltage Threshold
INPUT PINS: LI and HI
Low Level Input Voltage
High Level Input Voltage
Input Voltage Hysteresis
Low Level Input Current
High Level Input Current
I
IL
I
IH
V
IN
= 0V, Full Operating Conditions
V
IN
= 5V, Full Operating Conditions
V
IL
V
IH
Full Operating Conditions
Full Operating Conditions
0.8
-
-
-70
30
1.6
1.7
100
-60
115
-
2.2
-
-30
130
0.8
-
-
-80
30
-
2.2
-
-30
145
V
V
mV
A
A
I
DD
I
DDO
I
DDO
I
HBL
I
HBH
I
HBO
I
HBO
I
HLK
V
DDUV+
V
DDUV-
UVHYS
VHBUV
Referenced to HS
LI = 0 or V
DD
f = 50kHz
f = 500kHz
HI = 0
HI = V
DD
f = 50kHz, C
L
= 1000pF
f = 500kHz, C
L
= 1000pF
V
HS
= 80V
V
HB
= 96V
-
-
-
-
-
-
-
-
6.8
6.5
0.17
4.8
1.9
2.0
2.5
1.25
170
1.45
2.4
-
7.6
7.1
0.45
5.3
2.2
2.2
3.0
1.5
240
1.8
2.8
1
8.25
7.8
0.75
6.5
-
-
-
-
-
-
-
-
6.5
6.25
0.15
4.0
2.4
2.5
4.0
1.8
250
2.0
3.0
1
8.5
8.1
0.90
7.5
mA
mA
mA
mA
A
mA
mA
A
V
V
V
V
FN9077 Rev.6.00
December 29, 2004
Page 4 of 8
ISL6700
Electrical Specifications
V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, Unless Otherwise Specified
(Continued)
T
J
= 25°C
PARAMETERS
GATE DRIVER OUTPUT PINS: LO & HO
Low Level Output Voltage
High Level Output Voltage
Peak Pullup Current
Peak Pulldown Current
V
OL
V
DD
-V
OH
I
O
+
I
O
-
I
OUT
= 0A
I
OUT
= 0A
V
OUT
= 0V
V
OUT
= 12V
-
-
-
-
-
-
1.4
1.3
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
V
V
A
A
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
T
J
= -40°C TO
125°C
MIN
MAX
UNITS
Switching Specifications
V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, Unless Otherwise Specified
T
J
= 25°C
MIN
-
-
-
-
LI, HI switched simultaneously
0
0
-
-
-
-
TYP
45
60
75
70
24
17
5
5
8
-15
MAX
50
75
82
75
-
-
20
20
20
25
T
J
= -40°C
TO 125°C
MIN
-
-
-
-
0
0
-
-
-
-
MAX
65
90
95
95
-
-
25
25
25
30
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PARAMETERS
Lower Turn-off Propagation Delay
(LI Falling to LO Falling)
Upper Turn-off Propagation Delay
(HI Falling to HO Falling)
Lower Turn-on Propagation Delay
(LI Rising to LO Rising)
Upper Turn-on Propagation Delay
(HI Rising to HO Rising)
Deadtime, (t
HPLH
- t
LPHL
)
Deadtime, (t
LPLH
- t
HPHL
)
Rise Time
Fall Time
Delay Matching: Lower Turn-On and Upper Turn-Off
Delay Matching: Lower Turn-Off and Upper Turn-On
SYMBOL
t
LPHL
t
HPHL
t
LPLH
t
HPLH
DHt
ON
DLt
ON
t
R
t
F
t
MON
t
MOFF
TEST
CONDITIONS
Pin Descriptions
SYMBOL
V
DD
HI
LI
V
SS
LO
HS
HO
HB
EPAD
DESCRIPTION
Positive supply to control logic and lower gate drivers. De-couple this pin to V
SS
. Connect anode of bootstrap diode to this pin.
Logic level input that controls the HO output.
Logic level input that controls the LO output.
Chip negative supply, generally will be ground.
Low-side output. Connect to gate of low-side power MOSFET.
High-side source connection. Connect to source of high-side power MOSFET. Connect negative side of bootstrap capacitor to this
pin.
High-side output. Connect to gate of high-side power MOSFET.
High-side bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive
side of bootstrap capacitor to this pin.
Exposed pad. Connect to ground or float. The EPAD is electrically isolated from all other pins.
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