M50FLW040BK5G datasheet, PDF - EEWORLD Datasheet

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M50FLW040BK5G: DescriptionIC flash 4mbit 33mhz 32plcc; Categorystorage; File Size402KB，64 Pages; ManufacturerMicron; Websitehttp://www.micron.com/; Environmental Compliance

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IC flash 4mbit 33mhz 32plcc

M50FLW040BK5G Parametric

Parameter Name	Attribute value
Datasheets
M50FLW040(A, B)
Standard Package	32
Category	Integrated Circuits (ICs)
Family	Memory
Packaging	Tube
Format - Memory	FLASH
Memory Type	FLASH - NOR
Memory Size	4M (512K x 8)
Speed	33MHz
Interface	Parallel
Voltage - Supply	3 V ~ 3.6 V
Operating Temperature	-20°C ~ 85°C
Package / Case	32-LCC (J-Lead)
Supplier Device Package	32-PLCC (11.35x13.89)

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M50FLW040A

M50FLW040B

4-Mbit (5 × 64 Kbyte blocks + 3 × 16 × 4 Kbyte sectors)

3-V supply Firmware Hub / low-pin count Flash memory

Feature summary

■

Flash memory

– Compatible with either the LPC interface or

the FWH interface (Intel Spec rev1.1) used

in PC BIOS applications

– 5 Signal Communication Interface

supporting Read and Write Operations

– 5 Additional General Purpose Inputs for

platform design flexibility

– Synchronized with 33MHz PCI clock

8 blocks of 64 Kbytes

– 5 blocks of 64 KBytes each

– 3 blocks, subdivided into 16 uniform

sectors of 4 KBytes each

Two blocks at the top and one at the bottom

(M50FLW040A)

One block at the top and two at the bottom

(M50FLW040B)

Enhanced security

– Hardware Write Protect Pins for Block

Protection

– Register-based Read and Write Protection

Supply voltage

– V

= 3 to 3.6V for Program, Erase and

Read Operations

– V

= 12V for Fast Program and Erase

Two interfaces

– Auto Detection of Firmware Hub (FWH) or

Low Pin Count (LPC) Memory Cycles for

Embedded Operation with PC Chipsets

– Address/Address Multiplexed (A/A Mux)

Interface for programming equipment

compatibility.

Programming time: 10 µs typical

Program/Erase Controller

– Embedded Program and Erase algorithms

– Status Register Bits

■

PLCC32 (K)

■

TSOP32 (NB)

8 x 14mm

■

TSOP40 (N)

10 x 20mm

Program/Erase Suspend

– Read other Blocks/Sectors during Program

Suspend

– Program other Blocks/Sectors during Erase

Suspend

Electronic signature

– Manufacturer Code: 20h

– Device Code (M50FLW040A): 08h

– Device Code (M50FLW040B): 28h

Packages

– ECOPACK® (RoHS compliant)

■

October 2006

Rev 6

1/64

www.st.com

Contents

M50FLW040A, M50FLW040B

Contents

Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.1

Firmware Hub/low-pin count (FWH/LPC) signal descriptions . . . . . . . . . 13

2.1.1

2.1.2

2.1.3

2.1.4

2.1.5

2.1.6

2.1.7

2.1.8

2.1.9

2.1.10

2.1.11

Input/Output communications (FWH0/LAD0-FWH3/LAD3) . . . . . . . . . . 13

Input communication frame (FWH4/LFRAME) . . . . . . . . . . . . . . . . . . . 13

Identification inputs (ID0-ID3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

General-purpose inputs (GPI0-GPI4) . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Interface Configuration (IC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Interface Reset (RP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

CPU Reset (INIT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Clock (CLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Top Block Lock (TBL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Write Protect (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Reserved for Future Use (RFU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.2

Address/Address Multiplexed (A/A Mux) signal descriptions . . . . . . . . . . 15

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

2.2.6

Address inputs (A0-A10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Data Inputs/Outputs (DQ0-DQ7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Output Enable (G) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Write Enable (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Row/Column Address Select (RC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Ready/Busy output (RB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.3

Supply signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.3.1

2.3.2

2.3.3

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

optional supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.1

Firmware hub/low-pin count (FWH/LPC) bus operations . . . . . . . . . . . . . 18

3.1.1

3.1.2

3.1.3

3.1.4

3.1.5

Bus Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Bus Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Bus Abort . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2/64

M50FLW040A, M50FLW040B

3.1.6

Contents

Block Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.2

Address/Address Multiplexed (A/A Mux) bus operations . . . . . . . . . . . . . 20

3.2.1

3.2.2

3.2.3

3.2.4

Bus Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Bus Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Output Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Command interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.0.1

4.0.2

4.0.3

4.0.4

4.0.5

4.0.6

4.0.7

4.0.8

4.0.9

4.0.10

4.0.11

4.0.12

Read Memory Array command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Read Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Read Electronic Signature command . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Quadruple Byte Program command (A/A Mux interface) . . . . . . . . . . . . 28

Double/Quadruple Byte Program command (FWH mode) . . . . . . . . . . 28

Chip Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Sector Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Clear Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Program/Erase Suspend command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Program/Erase Resume command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.1

5.2

5.3

Program/Erase Controller status (Bit SR7) . . . . . . . . . . . . . . . . . . . . . . . 32

Erase Suspend status (Bit SR6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Erase status (Bit SR5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

Program status (Bit SR4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

status (Bit SR3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Program Suspend status (Bit SR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Block Protection status (Bit SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Reserved (Bit SR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Firmware hub/low pin count (FWH/LPC) interface Configuration

Registers 35

6.1

Lock Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.1.1

6.1.2

6.1.3

Write Lock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Read Lock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Lock Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

3/64

M50FLW040A, M50FLW040B

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Signal names (FWH/LPC Interface) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Signal names (A/A Mux interface) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Addresses (M50FLW040A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Addresses (M50FLW040B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Memory identification input configuration (LPC mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

FWH bus read field definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

FWH bus write field definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

LPC bus read field definitions (1-byte) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

LPC bus write field definitions (1 byte) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

A/A Mux bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Command codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Electronic signature codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Status Register bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Configuration Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Lock Register bit definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

General-Purpose Input Register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Program and Erase times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

FWH/LPC interface AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

A/A Mux interface AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

FWH/LPC interface clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

FWH/LPC interface AC signal timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Reset AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

A/A Mux interface Read AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

A/A Mux interface Write AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

PLCC32 – 32 pin Rectangular Plastic Leaded Chip Carrier, package mechanical data . . 48

TSOP32 – 32 lead Plastic Thin Small Outline, 8x14 mm, package

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

TSOP40 – 40 lead Plastic Thin Small Outline, 10 x 20mm, package

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

M50FLW040A block and sector addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

M50FLW040B block and sector addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

5/64

M50FLW040BK5G Related Products

	M50FLW040BK5G	M50FLW040AK5G	M50FLW040AK5TG	M50FLW040AN5G	M50FLW040ANB5G	M50FLW040ANB5TG	M50FLW040BNB5G	M50FLW040BNB5TG	M50FLW040BN5G
Description	IC flash 4mbit 33mhz 32plcc	IC flash 4mbit 33mhz 32plcc	IC flash 4mbit 33mhz 32plcc	IC flash 4mbit 33mhz 40tsop	IC flash 4mbit 33mhz 32tsop	IC flash 4mbit 33mhz 32tsop	IC flash 4mbit 33mhz 32tsop	IC flash 4mbit 33mhz 32tsop	IC flash 4mbit 33mhz 40tsop
Standard Package	32	32	750	120	208	1,500	208	1,500	120
Category	Integrated Circuits (ICs)	Integrated Circuits (ICs)	Integrated Circuits (ICs)	Integrated Circuits (ICs)	Integrated Circuits (ICs)	Integrated Circuits (ICs)	Integrated Circuits (ICs)	Integrated Circuits (ICs)	Integrated Circuits (ICs)
Family	Memory	Memory	Memory	Memory	Memory	Memory	Memory	Memory	Memory
Packaging	Tube	Tube	Tape & Reel (TR)	Tray	Tray	Tape & Reel (TR)	Tray	Tape & Reel (TR)	Tray
Format - Memory	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH
Memory Type	FLASH - NOR	FLASH - NOR	FLASH - NOR	FLASH - NOR	FLASH - NOR	FLASH - NOR	FLASH - NOR	FLASH - NOR	FLASH - NOR
Memory Size	4M (512K x 8)	4M (512K x 8)	4M (512K x 8)	4M (512K x 8)	4M (512K x 8)	4M (512K x 8)	4M (512K x 8)	4M (512K x 8)	4M (512K x 8)
Speed	33MHz	33MHz	33MHz	33MHz	33MHz	33MHz	33MHz	33MHz	33MHz
Interface	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel
Voltage - Supply	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V	3 V ~ 3.6 V
Operating Temperature	-20°C ~ 85°C	-20°C ~ 85°C	-20°C ~ 85°C	-20°C ~ 85°C	-20°C ~ 85°C	-20°C ~ 85°C	-20°C ~ 85°C	-20°C ~ 85°C	-20°C ~ 85°C
Package / Case	32-LCC (J-Lead)	32-LCC (J-Lead)	32-LCC (J-Lead)	40-TFSOP (0.724", 18.40mm Width)	32-TFSOP (0.488", 12.40mm Width)	32-TFSOP (0.488", 12.40mm Width)	32-TFSOP (0.488", 12.40mm Width)	32-TFSOP (0.488", 12.40mm Width)	40-TFSOP (0.724", 18.40mm Width)
Supplier Device Package	32-PLCC (11.35x13.89)	32-PLCC (11.35x13.89)	32-PLCC (11.35x13.89)	40-TSOP (10x20)	32-TSOP (8x14)	32-TSOP (8x14)	32-TSOP (8x14)	32-TSOP (8x14)	40-TSOP (10x20)

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[HPM6750 Review Part 2] CoreMark Verification (Comparison between external flash xip and internal sram): Since most domestic semiconductor manufacturers have very poor performance in running external storage xip memory mapping (that is, divided into the so-called zero wait and non-zero wait areas), the r...; RCSN Domestic Chip Exchange

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