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5962G9658201VCC

Description
Parity Generator/Checker, AC Series, 9-Bit, Complementary Output, CMOS, CDIP14, CERAMIC, SIDE BRAZED, DIP-14
Categorylogic    logic   
File Size253KB,10 Pages
ManufacturerCobham Semiconductor Solutions
Download Datasheet Parametric View All

5962G9658201VCC Overview

Parity Generator/Checker, AC Series, 9-Bit, Complementary Output, CMOS, CDIP14, CERAMIC, SIDE BRAZED, DIP-14

5962G9658201VCC Parametric

Parameter NameAttribute value
MakerCobham Semiconductor Solutions
Parts packaging codeDIP
package instructionDIP,
Contacts14
Reach Compliance Codeunknown
ECCN code3A001.A.1.A
seriesAC
JESD-30 codeR-CDIP-T14
JESD-609 codee4
Logic integrated circuit typePARITY GENERATOR/CHECKER
Number of digits9
Number of functions1
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
propagation delay (tpd)22 ns
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class V
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
total dose500k Rad(Si) V
width7.62 mm
Base Number Matches1
Standard Products
UT54ACS280/UT54ACTS280
9-Bit Parity Generators/Checkers
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
Generates either odd or even parity for nine data lines
Cascadable for n-bits parity
1.2μ
CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 14-pin DIP
- 14-lead flatpack
UT54ACS280 - SMD 5962-96582
UT54ACTS280 - SMD 5962-96583
DESCRIPTION
The UT54ACS280 and the UT54ACTS280 are 9-bit parity gen-
erators/checkers that use high-performance circuitry and fea-
tures odd and even outputs to facilitate operation of either odd
or even parity application. The word-length capability is easily
expanded by cascading.
The devices are characterized over full military temperature
range of -55°C to +125°C.
FUNCTION TABLE
NUMBER OF INPUTS A THRU I
THAT ARE HIGH
OUTPUT
Σ
EVEN
0,2,4,6,8
1,3,5,7,9
H
L
Σ
ODD
L
H
PINOUTS
14-Pin DIP
Top View
G
H
NC
I
EVEN
ODD
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
F
E
D
C
B
A
14-Lead Flatpack
Top View
G
H
NC
I
EVEN
ODD
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
F
E
D
C
B
A
LOGIC SYMBOL
(8)
(9)
(10)
(11)
(12)
(13)
(1)
(2)
(4)
(6)
ODD
(5)
EVEN
2k
A
B
C
D
E
F
G
H
I
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.
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