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X40237S16I-A

Description
IC voltage mon trpl EE 16-soic
Categorysemiconductor    Power management   
File Size1MB,36 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
Download Datasheet Parametric View All

X40237S16I-A Overview

IC voltage mon trpl EE 16-soic

X40237S16I-A Parametric

Parameter NameAttribute value
Datasheets
X4023x
Product Photos
16-TSSOP, M16.173 PKG
Standard Package94
CategoryIntegrated Circuits (ICs)
FamilyPMIC - Supervisors
PackagingTube
TypeMulti-Voltage Supervis
Number of Voltages Monitored3
OutpuOpen Drain, Open Drai
ReseActive High/Active Low
Reset TimeouAdjustable/Selectable
Voltage - Threshold1.75V, 2.2V, 2.95V
Operating Temperature-40°C ~ 85°C
Mounting TypeSurface Mou
Package / Case16-SOIC (0.295", 7.50mm Width)
Supplier Device Package16-SOIC
DATASHEET
X40231, X40233, X40235, X40237, X40239
Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM
Memory, and Single/Dual DCP
FEATURES
• Triple Voltage Monitors
—User Programmable Threshold Voltage
—Power-on Reset (POR) Circuitry
—Software Selectable Reset timeout
—Manual Reset Input
• 2-Wire industry standard Serial Interface
• 2 kbit EEPROM with Write Protect & Block Lock
TM
• Digitally Controlled Potentiometers (DCP)
X4023X Family Selector Guide
X= 256 tap 100 tap 64 Tap
1
3
5
7
9
1
1
1
1
1
1
1
FN8115
Rev 0.00
April 11, 2005
DESCRIPTION
The X4023x family of Integrated System Manage-
ment ICs combine CPU Supervisor functions (V
CC
Power-onpower-on Reset (POR) circuitry, two addi-
tional programmable voltage monitor inputs with soft-
ware and hardware indicators), integrated EEPROM
with Block Lock
TM
protection and one or two Intersil
Digitally Controlled Potentiometers (XDCP). All func-
tions of the X4023x are accessed by an industry
standard 2-Wire serial interface.
APPLICATIONS
The DCP of the X4023x may be utilized to software
control analog voltages for:
– LCD contrast, LCD purity, or Backlight control.
– Power Supply settings such as PWM frequency,
Voltage Trimming or Margining (temperature offset
control).
– Reference voltage setting (e.g. DDR-SDRAM SSTL-2)
The 2 kbit integrated EEPROM may be used to store
ID, manufacturer data, maintenance data and module
definition data.
The programmable POR circuit insures V
CC
is stable
before RESET is removed and protects against
brown-outs and power failures. The programmable
voltage monitors have on-chip independent reference
alarm levels. With separate outputs, the voltage moni-
tors can be used for power-on sequencing.
—Total Resistance
256 Tap = 100k100 Tap or 64 Tap = 10k
—Nonvolatile wiper position
—Write Protect Function
• Single Supply Operation
—2.7V to 5.5V
• 16 Pin SOIC (300) package
—SOIC
BLOCK DIAGRAM
8
WP
PROTECT LOGIC
WIPER
COUNTER
REGISTER
R
H
R
W
256 Tap DCP
SDA
DATA
REGISTER
COMMAND
DECODE &
CONTROL
LOGIC
THRESHOLD
RESET LOGIC
4
CR
REGISTER
8 - BIT
NONVOLATILE
MEMORY
SCL
2 kbit
EEPROM
ARRAY
WIPER
COUNTER
REGISTER
R
H
R
W
Optional
64 or 100 Tap DCP
Manual Reset (MR)
V3MON
VTRIP
3
V2MON
VTRIP
2
V
CC
V
SS
VTRIP
1
2
-
+
8 - BIT
NONVOLATILE
MEMORY
V3FAIL
-
+
V2FAIL
+
POWER-ON /
LOW VOLTAGE
RESET
GENERATION
RESET
©2000 Intersil Inc., Patents Pending (VTRIP
1,2,3
are user programmable)
FN8115 Rev 0.00
April 11, 2005
Page 1 of 36
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