935363026557 datasheet, PDF - EEWORLD Datasheet

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935363026557: DescriptionMultifunction Peripheral; CategoryThe embedded processor and controller Microcontrollers and processors; File Size4MB，208 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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935363026557 Overview

Multifunction Peripheral

935363026557 Parametric

Parameter Name	Attribute value
Maker	NXP
package instruction	,
Reach Compliance Code	unknown
Base Number Matches	1

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NXP Semiconductors

Data Sheet: Technical Data

Document Number: IMX6SXAEC

Rev. 4, 11/2018

MCIMX6XxAxxxxxB

MCIMX6XxAxxxxxC

i.MX 6SoloX

Automotive

and Infotainment

Applications Processors

Package Information

Plastic Package

BGA 19 x 19 mm, 0.8 mm pitch

BGA 17 x 17 mm, 0.8 mm pitch

BGA 14 x 14 mm, 0.65 mm pitch

Ordering Information

See Table 1 on page 3

Introduction

The i.MX 6SoloX automotive and infotainment

processors represent NXP Semiconductor’s latest

achievement in integrated multimedia-focused products

offering high-performance processing with a high degree

of functional integration. These processors are designed

considering the needs of the growing automotive

infotainment, telematics, HMI, and display-based cluster

markets.

The i.MX 6SoloX processor features NXP’s advanced

implementation of the single Arm

Cortex

-A9 core,

which operates at speeds of up to 800 MHz, in addition

to the Arm Cortex-M4 core, which operates at speeds of

up to 227 MHz. This type of heterogeneous multicore

architecture provides greater levels of system

integration, smart low-power system awareness, and fast

real-time responsiveness. The i.MX 6SoloX includes a

GPU processor capable of supporting 2D and 3D

operations, a wide range of display and connectivity

options, and integrated power management. Each

processor provides a 32-bit

DDR3/DDR3L/LPDDR2-800 memory interface and a

number of other interfaces for connecting peripherals,

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.1 Special Signal Considerations. . . . . . . . . . . . . . . . 18

3.2 Recommended Connections for Unused Analog

Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 20

4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . 20

4.2 Power Supplies Requirements and Restrictions . . 33

4.3 Integrated LDO Voltage Regulator Parameters . . 34

4.4 PLL Electrical Characteristics . . . . . . . . . . . . . . . . 36

4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . 37

4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 38

4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 43

4.8 Output Buffer Impedance Parameters. . . . . . . . . . 46

4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . 49

4.10 Multi-mode DDR Controller (MMDC). . . . . . . . . . . 61

4.11 General-Purpose Media Interface (GPMI) Timing. 62

4.12 External Peripheral Interface Parameters . . . . . . . 70

4.13 A/D Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 119

5.1 Boot Mode Configuration Pins. . . . . . . . . . . . . . . 119

5.2 Boot Device Interface Allocation . . . . . . . . . . . . . 121

Package Information and Contact Assignments . . . . . . 129

6.1 i.MX 6SoloX Signal Availability by Package . . . . 129

6.2 Signals with Different States During Reset and After

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

6.3 19x19 mm Package Information . . . . . . . . . . . . . 132

6.4 17x17 mm Package Information . . . . . . . . . . . . . 151

6.5 14x14 mm Package Information . . . . . . . . . . . . . 186

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202

NXP Reserves the right to change the production detail specifications as may be

required to permit improvements in the design of its products

Introduction

such as WLAN, Bluetooth™, GPS, displays, and camera sensors.

The i.MX 6SoloX processors are specifically useful for applications such as:

• Entry-level infotainment

• Telematics

The features of the i.MX 6SoloX processors include:

• Dual-core architecture with one Arm Cortex-A9 processor plus one Arm Cortex-M4 processor—

Dual-core architecture enables the device to run an open operating system like Linux on the

Cortex-A9 core and an RTOS like MQX™ or FreeRTOS™ on the Cortex-M4 core. The Cortex-M4

core is standard on all i.MX 6SoloX processors.

• Multilevel memory system—The multilevel memory system of each processor is based on the L1

instruction and data caches, L2 cache, and internal and external memory. The processors support

many types of external memory devices, including DDR3, low voltage DDR3, LPDDR2, NOR

Flash, NAND Flash (MLC and SLC), OneNAND, Quad SPI, and managed NAND, including

eMMC up to rev 4.4/4.41/4.5.

• Smart speed technology—Power management implemented throughout the IC that enables

multimedia features and peripherals to consume minimum power in both active and various low

power modes.

• Dynamic voltage and frequency scaling—The processors improve the power efficiency of devices

by scaling the voltage and frequency to optimize performance.

• Multimedia powerhouse—The multimedia performance of each processor is enhanced by a

multilevel cache system, NEON™ MPE (Media Processor Engine) co-processor, a programmable

smart DMA (SDMA) controller, and an asynchronous sample rate converter.

• 2x Gigabit Ethernet with AVB—2x 10/100/1000 Mbps Gigabit Ethernet controllers with support

for Audio Video Bridging (AVB) for reliable, high-quality, low-latency multimedia streaming.

• Human-machine interface—Each processor provides a single integrated graphics processing unit

that supports an OpenGL ES 2.0 and OpenVG 1.1 3D and 2D graphics accelerator. In addition,

each processor provides up to two separate display interfaces (parallel display and LVDS display)

and a CMOS sensor interface (parallel).

• Interface flexibility—Each processor supports connections to a variety of interfaces: High-speed

USB on-the-go with PHY, high-speed USB host with PHY, High-Speed Inter-Chip USB, multiple

expansion card ports (high-speed MMC/SDIO host and other), 2 Gigabit Ethernet controllers with

support for Ethernet AVB, PCIe-II, two 12-bit ADC modules with 4 dedicated single-ended inputs,

two CAN ports, ESAI audio interface, and a variety of other popular interfaces (such as UART, I

and I

S serial audio).

• Automotive environment support—Each processor includes interfaces, such as two CAN ports, an

MLB25/50 port, an ESAI audio interface, and an asynchronous sample rate converter for

multichannel/multisource audio.

• Advanced security—The processors deliver hardware-enabled security features that enable secure

e-commerce, digital rights management (DRM), information encryption, secure boot, and secure

software downloads. The security features are discussed in detail in the

i.MX 6SoloX Security

Reference Manual

(IMX6XSRM).

i.MX 6SoloX Automotive and Infotainment Applications Processors, Rev. 4, 11/2018

NXP Semiconductors

935363026557 Related Products

	935363026557	935323753557	935315812557	i.MX6SX	935315934557	935353852557
Description	Multifunction Peripheral	Multifunction Peripheral	Multifunction Peripheral	i.MX 6SoloX Processor - Heterogeneous processing with Arm® Cortex®-A9 and Cortex-M4 cores	Multifunction Peripheral	Multifunction Peripheral
Maker	NXP	NXP	NXP	-	-	NXP
Reach Compliance Code	unknown	unknown	unknown	-	unknown	unknown
Base Number Matches	1	1	1	-	1	-

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