EXPOSED PAD (PIN 13) IS PGND, MUST BE SOLDERED TO PCB FOR OPTIMAL
THERMAL PERFORMANCE
MSE PACKAGE
12-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JA
= 40°C/W,
θ
JC
= 10°C/W
EXPOSED PAD (PIN 13) IS PGND, MUST BE SOLDERED TO PCB FOR OPTIMAL
THERMAL PERFORMANCE
orDer inForMaTion
LEAD FREE FINISH
LTC3864EMSE#PBF
LTC3864IMSE#PBF
LTC3864HMSE#PBF
LTC3864MPMSE#PBF
LTC3864EDE#PBF
LTC3864IDE#PBF
LTC3864HDE#PBF
LTC3864MPDE#PBF
TAPE AND REEL
LTC3864EMSE#TRPBF
LTC3864IMSE#TRPBF
LTC3864HMSE#TRPBF
LTC3864MPMSE#TRPBF
LTC3864EDE#TRPBF
LTC3864IDE#TRPBF
LTC3864HDE#TRPBF
LTC3864MPDE#TRPBF
PART MARKING*
3864
3864
3864
3864
3864
3864
3864
3864
PACKAGE DESCRIPTION
12-Lead Plastic MSOP
12-Lead Plastic MSOP
12-Lead Plastic MSOP
12-Lead Plastic MSOP
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
12-Lead (4mm × 3mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
3864fa
2
For more information
www.linear.com/LTC3864
LTC3864
elecTrical characTerisTics
SYMBOL
Input Supply
V
IN
V
UVLO
I
Q
Input Voltage Operating Range
Undervoltage Lockout
(V
IN
-V
CAP
) Ramping Up Threshold
(V
IN
-V
CAP
) Ramping Down Threshold
Hysteresis
PLLIN/MODE = 0V, FREQ = 0V,
V
FB
= 0.83V (No Load)
PLLIN/MODE = Open, FREQ = 0V,
V
FB
= 0.83V (No Load)
RUN = 0V
V
ITH
= 1.2V (Note 5)
V
IN
= 3.8V to 60V (Note 5)
V
ITH
= 0.6V to 1.8V (Note 5)
V
ITH
= 1.2V, ∆I
ITH
= ±5µA (Note 5)
–50
V
FB
= 0.77V
V
SENSE
= V
IN
V
RUN
Rising
V
SS
= 0V
R
FREQ
= 24.9kΩ
R
FREQ
= 64.9kΩ
R
FREQ
= 105kΩ
FREQ = 0V
FREQ = Open
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. (Notes 3, 4) V
IN
= 12V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
3.5
3.25
3.00
3.50
3.25
0.25
0.77
40
7
0.792
–0.005
–0.1
–0.015
1.8
–10
95
0.1
1.22
1.26
150
10
105
440
810
350
535
50
103
2
1.32
0.800
TYP
MAX
60
3.8
3.50
UNITS
V
V
V
V
mA
µA
µA
V
%/V
%
mS
nA
mV
µA
V
mV
µA
kHz
kHz
kHz
kHz
kHz
kHz
V
0.5
18
220
I
GATE
= 0mA
V
IN
= 5V, I
GATE
= 15mA
9V ≤ V
IN
≤ 60V, I
GATE
= 0mA
Load = 0mA to 20mA
–3.5
l
Input DC Supply Current
Pulse-Skipping Mode
Burst Mode Operation
Shutdown Supply Current
1.2
60
12
0.809
0.005
0.1
Output Sensing
V
REG
∆V
REG
∆V
IN
∆V
REG
∆V
ITH
g
m(EA)
I
FB
V
ILIM
I
SENSE
V
RUN
V
RUNHYS
I
SS
f
Regulated Feedback Voltage
Feedback Voltage Line Regulation
Feedback Voltage Load Regulation
Error Amplifier Transconductance
Feedback Input Bias Current
Current Limit Threshold (V
IN
-V
SENSE
)
SENSE Pin Input Current
RUN Pin Enable Threshold
RUN Pin Hysteresis
Soft-Start Pin Charging Current
Programmable Switching Frequency
Current Sensing
85
Start-Up and Shutdown
Switching Frequency and Clock Synchronization
375
320
485
75
2
505
380
585
750
f
LO
f
HI
f
SYNC
V
CLK(IH)
V
CLK(LO)
f
FOLD
t
ON(MIN)
Gate Driver
V
CAP
V
CAPDROP
Low Switching Frequency
High Switching Frequency
Synchronization Frequency
Clock Input High Level into PLLIN/MODE
Clock Input Low Level into PLLIN/MODE
Foldback Frequency as Percentage of
Programmable Frequency
Minimum On-Time
Gate Bias LDO Output Voltage (V
IN
-V
CAP
)
Gate Bias LDO Dropout Voltage
V
%
ns
V
FB
= 0V, FREQ = 0V
7.6
8.0
0.2
0.002
8.5
0.5
0.03
V
V
%/V
%
3864fa
∆V
CAP(LINE)
Gate Bias LDO Line Regulation
∆V
CAP(LOAD)
Gate Bias LDO Load Regulation
For more information
www.linear.com/LTC3864
3
LTC3864
elecTrical characTerisTics
SYMBOL
R
UP
R
DN
V
PGL
I
PG
%PGD
PARAMETER
Gate Pull-Up Resistance
Gate Pull-Down Resistance
PGOOD Voltage Low
PGOOD Leakage Current
PGOOD Trip Level
The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. (Notes 3, 4) V
IN
= 12V, unless otherwise noted.
CONDITIONS
Gate High
Gate Low
I
PGOOD
= 2mA
V
PGOOD
= 5V
V
FB
Ramping Negative with Respect to V
REG
Hysteresis
V
FB
Ramping Positive with Respect to V
REG
Hysteresis
t
PGDLY
V
FBOV
PGOOD Delay
V
FB
Overvoltage Lockout Threshold
PGOOD Going High to Low
PGOOD Going Low to High
GATE Going High without Delay,
V
FB(OV)
-V
FB(NOM)
in Percent
–13
7
–10
2.5
10
2.5
100
100
10
MIN
TYP
2
0.9
0.2
0.4
1
–7
13
MAX
UNITS
Ω
Ω
V
µA
%
%
%
%
µs
µs
%
PGOOD and Overvoltage
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Continuous operation above the specified maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 3:
The junction temperature (T
J
in °C) is calculated from the ambient
temperature (T
A
in °C) and power dissipation (P
D
in Watts) as follows:
T
J
= T
A
+ (P
D
•
θ
JA
)
where
θ
JA
(in °C/W) is the package thermal impedance provided in the Pin
Configuration section for the corresponding package.
Note 4:
The LTC3864 is tested under pulsed loading conditions such that
T
J
≈ T
A
. The LTC3864E is guaranteed to meet performance specifications
from 0°C to 85°C operating junction temperature range. The LTC3864E
specifications over the –40°C to 125°C operating junction temperature
range are assured by design, characterization and correlation with statistical
process controls. The LTC3864I is guaranteed to meet performance
specifications over the –40°C to 125°C operating junction temperature
range, the LTC3864H is guaranteed over the –40°C to 150°C operating
junction temperature range, and the LTC3864MP is guaranteed and tested
over the full –55°C to 150°C operating junction temperature range. High
junction temperatures degrade operating lifetimes; operating lifetime is
derated for junction temperatures greater than 125°C. The maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors.
Note 5:
The LTC3864 is tested in a feedback loop that adjust V
FB
to achieve
a specified error amplifier output voltage (on ITH pin).
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FPGA/CPLD
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