CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional
operability under any of these conditions is not necessarily implied.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
Off-Hook I
B
+
Off-Hook I
B
-
Off-Hook Loop Current
Off-Hook Loop Current
Off-Hook Loop Current
Switch Hook Detection Threshold
Unless Otherwise Specified, V
BAT
= -48V, V
CC
= 5V, AG = BG = DG = 0V, Typical Parameters
T
A
= 25
o
C. Min-Max Parameters are Over Operating Temperature Range
CONDITIONS
R
L
= 600Ω, T
A
= 25
o
C
R
L
= 600Ω
R
L
= 1200Ω
R
L
= 1200Ω, V
BAT
= -42V, T
A
= 25
o
C
R
L
= 200Ω
SHD = V
OL
SHD = V
OH
MIN
-
-
-
17.5
25.5
10
-
0
1V
RMS
200Hz - 3400Hz, (Note 3) IEEE Method
0
o
C
≤
T
A
≤
75
o
C
TYP
-
-
21
-
30
-
-
-
MAX
5.3
39
-
-
34.5
-
5
5
UNITS
mA
mA
mA
mA
mA
mA
mA
µs
Dial Pulse Distortion
Longitudinal Balance
2-Wire Off-Hook
2-Wire On-hook
Tip and Ring to TX, Off-hook
Insertion Loss
2-Wire to TX, RX to 2-Wire
Frequency Response
200 - 3400Hz Referenced to Absolute Loss at 1kHz and
0dBm Signal Level (Note 3)
(Note 3)
At 1kHz, 0dBm Input Level, Referenced 600Ω
-
-
-
65
63
58
±0.05
±0.02
-
-
-
±0.2
±0.05
dB
dB
dB
-
-
dB
dB
Idle Channel Noise
2-Wire to TX, RX to 2-Wire
-
-
1
-89
40
5
-85
-
dBrnC
dBm0p
dB
Trans Hybrid Loss
RX to TX
Balance Network Set Up for 600Ω Termination at 1kHz
-
50
HC5503C
Electrical Specifications
PARAMETER
Overload Level, 2-Wire to TX, RX to 2-Wire
Level Linearity
2-Wire to TX, RX to 2-Wire
V
CC
= +5V, (Note 3)
At 1kHz, (Note 3) Referenced to 0dBm Level
+3 to -40dBm
-40 to -50dBm
-50 to -55dBm
Power Supply Rejection Ratio
V
CC
to 2-Wire
V
CC
to Transmit
V
BAT
to 2-Wire
V
BAT
to Transmit
Logic Input Current ( RS)
Logic Input ( RS)
Logic ‘0’ V
IL
Logic ‘1’ V
IH
Logic Output ( SHD)
Logic ‘0’ V
OL
Logic ‘1’ V
OH
NOTE:
3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial
design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification
compliance.
I
LOAD
800µA, V
CC
= 5V
I
LOAD
40µA, V
CC
= 5V
-
2.7
0.1
-
0.5
5.0
V
V
-
2.0
-
-
0.8
5.5
V
V
0V
≤
V
IN
≤
5V
(Note 3)
200 - 3400kHz, R
L
= 600Ω
-
-
-
-
-
40
40
40
40
-
-
-
-
-
±100
dB
dB
dB
dB
µA
-
-
-
-
-
-
±0.05
±0.1
±0.3
dB
dB
dB
Unless Otherwise Specified, V
BAT
= -48V, V
CC
= 5V, AG = BG = DG = 0V, Typical Parameters
T
A
= 25
o
C. Min-Max Parameters are Over Operating Temperature Range
(Continued)
CONDITIONS
MIN
2.5
TYP
-
MAX
-
UNITS
V
PEAK
Pinouts
HC5503C (PDIP)
TOP VIEW
TIP
RING
V
CC
C1
DGND
RS
N/C
TF
VB(INT)
V
BAT
BGND
1
2
3
4
5
6
7
8
9
10
11
22 TX
21 AGND
20 N/C
19 RX
18 T3
17 T2
16 T1
15 N/C
14 N/C
13 N/C
12 SHD
TIP
RING
V
CC
N/C
C1
DGND
RS
N/C
TF
1
2
3
4
5
6
7
8
9
HC5503C (SOIC)
TOP VIEW
24 TX
23 AGND
22 N/C
21 RX
20 T3
19 T2
18 T1
17 N/C
16 N/C
15 N/C
14 N/C
13 SHD
VB(INT) 10
V
BAT
11
BGND 12
51
HC5503C
Pin Descriptions
PDIP
1
SOIC
1
SYMBOL
TIP
DESCRIPTION
An analog input connected to the TIP (more positive) side of the subscriber loop through a 150Ω feed resistor.
Functions with the Ring terminal to receive voice signals from the telephone and for loop monitoring
purposes.
An analog input connected to the RING (more negative) side of the subscriber loop through a 150Ω feed
resistor. Functions with the Tip terminal to receive voice signals from the telephone and for loop monitoring
purposes.
Positive Voltage Source - Most positive supply. V
CC
is typically 5V.
No connect. For proper operation this pin should be left floating.
Capacitor - An external capacitor to be connected between this terminal and analog ground. Required for
proper operation of the voice band hybrid. Typical value is 0.3µF, 30V.
Digital Ground - To be connected to zero potential and serves as a reference for all digital inputs and outputs
on the SLIC microcircuit.
This pin should be tied to 5V.
No connect. For proper operation this pin should be left floating.
Tip Feed - A low impedance analog output connected to the TIP terminal through a 150Ω feed resistor.
Provides voice signals to the telephone set and sink longitudinal current.
A low impedance analog output connected to the Ring terminal through a 150Ω feed resistor. This pin
provides a loop current path to battery.
Negative Voltage Source - Most negative supply. V
BAT
has an operational range of -24V to -58V. Frequently
referred to as “battery”.
Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into
this ground terminal.
Switch Hook Detection - A low active LS TTL - compatible logic output. This output is enabled for loop
currents exceeding 10mA and disabled for loop currents less than 5mA.
No connect. For proper operation this pin should be left floating.
No connect. For proper operation this pin should be left floating.
No connect. For proper operation this pin should be left floating.
No connect. For proper operation this pin should be left floating.
Used during production testing. For proper operation this pin should be connected to pin T2.
Used during production testing. For proper operation this pin should be connected to pin T1.
Used during production testing. For proper operation this pin should be connected to Analog Ground pin
AGND.
Receive Input - A high impedance analog input which is internally biased. Capacitive coupling to this input is
required. AC signals appearing at this input differentially drive the Tip feed and Ring feed terminals, which in
turn drive tip and ring through 300Ω of feed resistance on each side of the line.
No connect. For proper operation this pin should be left floating.
Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX)
and receive input (RX) terminals.
Transmit Output - A low impedance analog output which represents the differential voltage across Tip and
Ring. This output is unbalanced and referenced to analog ground. Since the DC level of this output varies
with loop current, capacitive coupling to the next stage is essential.
2
2
RING
3
3
4
V
CC
N/C
C
1
DGND
RS
N/C
TF
VB(INT)
V
BAT
BGND
SHD
N/C
N/C
N/C
N/C
T1
T2
T3
RX
4
5
6
7
8
9
10
11
12
13
5
6
7
8
9
10
11
12
13
14
15
14
15
16
17
18
19
16
17
18
19
20
21
20
21
22
22
23
24
N/C
AGND
TX
NOTE: All grounds (AGND, BGND, and DGND) must be applied before V
CC
or V
BAT
. Failure to do so may result in premature failure of the part. If
a user wishes to run separate grounds off a line card, the AG must be applied first.
52
HC5503C
Applications Diagram
SYSTEM CONTROLLER
13
5V
RS
TIP
K
1A
R
B1
R
B2
(NOTE 4)
1
9
TIP FEED
RX
SLIC
HC5503C
VB(INT)
21
TIP
C
4
SHD
TX
24
C
5
PRIMARY
PROTEC-
TION
SUBSCRIBER
LOOP
T3
T2
T1
20
19
18
V
BAT
10
R
B4
K
1A
2
R
B3
RING
V
BAT
11
BGND DGND AGND
C
2
12
6
23
RING
C1 5
V
CC
C
3
3
C
1
PTC
-48V
V
CC
Z
1
RING GENERATOR
-48V
PIN NUMBERS GIVEN FOR SOIC PACKAGE.
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
Typical Component Values
C
1
= 0.3µF, 30V,
±20%
C
2
= 0.01µF, 100V,
±20%
R
B1
= R
B2
= R
B3
= R
B4
= 150Ω
C
3
= 0.01µF, 20V,
±20%
C
4
= 0.5µF, 20V,
±20%
C5 = 0.5µF, 20V,
±20%
PTC used as ring generator ballast.
NOTES:
4. Secondary protection diode bridge recommended is a 2A, 200V type.
5. All grounds (AG, BG, and DG) must be applied before V
CC
or V
BAT
. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
6. Application shows Ring Injected Ringing.
TX
HC5503C
HC5503C
SLIC
SLIC
RX
DUAL
OP-AMP
CD22100E
CROSSPOINT
SWITCH
DUAL
OP-AMP
JUNC
JUNC
TX
HC5503C
SLIC
RX
FIGURE 2. TYPICAL ANALOG KEY SYSTEM CONNECTION
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
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