8MH4-622.080AJT datasheet, PDF

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8MH4-622.080AJT: DescriptionOscillator; CategoryPassive components oscillator; File Size248KB，4 Pages; ManufacturerIDT (Integrated Device Technology)

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8MH4-622.080AJT Overview

Oscillator

8MH4-622.080AJT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	109006858
Reach Compliance Code	unknown

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Integrated

Circuit

Systems, Inc.

PRELIMINARY

ICS8Mx4

nOUT

OUT

Crystal Oscillator:

LVDS C

LOCK

UTPUT

ICS8Mx4

ITTER

, H

IGH

REQUENCY

TAL

SCILLATOR

•

(including initial accuracy, operating temperature variation,

supply voltage variation, load variation, reflow drift, and aging for 10 years)

Low phase jitter < 1 ps rms maximum

(12kHz to 20MHz)

6-pin CERHERMETIC 5 x 7 x 1.5mm SMT

LECTRICAL

PECIFICATIONS

Unless stated otherwise, V

= 2.5 Volts + 5% or 3.3 Volts + 5%, T

= 0

C to +70

C (commercial), T

= -40

C to +85

C (industrial)

Parameter

Min

Typ

Max

Unit

Conditions

HARACTERISTICS

Power Supply Voltage

3.135

3.3

3.465

3.3V operation

Power Supply

2.375

2.5

2.625

2.5V operation

8MJ4 and 8MK4 only

, V

pins)

Power Supply Current

= V

Current with Output Disable

Input Capacitance

Input High Voltage

Output Enable

Input Low Voltage

(OE pin)

LVCMOS/LVTTL Input High Current

Input Low Current

Internal Pull-up Resistor

Clock Output

Level

(OUT, nOUT)

LVDS

Differential Output Voltage

Magnitude Change

Offset Voltage

Magnitude Change

OED

PULLUP

∆

∆f/f

odc

OSC

600

1.25

150

750

±100

±50

Output Duty Cycle

Output Rise Time

Output Fall Time

Oscillator Start-up Time

-150

350

0.7 x

<0.6

0.3 x

µA

kΩ

MHz

ppm p-p

20%

80%

of V

20%

80%

of V

in 8MH4 and 8MK4

in 8MG4 and 8MJ4

All conditions

Includes frequency set,

& load variation,

reflow drift, 10 yr. aging

See

Output Duty Cycle diagram

and Rise and Fall Time diagram

in P

ARAMETER

EASUREMENT

NFORMATION

= G

= V

= 2.625 or 3.465V

= 2.625 or 3.465V,

= 0V

100Ω

terminatation between

OUT

and

nOUT

See P

ARAMETER

EASUREMENT

NFORMATION

HARACTERISTICS

Output Frequency Range

Output

Frequency Stability error

(OUT, nOUT)

Time at Min. V

(3.135V or 2.375V) to be 0s

(design target)

Deterministic

Random

Root Mean Square

Peak to Peak

Accumulated Jitter

n = 2 to 50,000 cycles

of Random jitter

of Total jitter distribution

RMS Phase Jitter, (Random)

jit(Ø)

Jitter

RMS

acc

0.2

ps rms

design target

Note 1: Measured using an Aeroflex PN9500 with a 12 kHz to 20MHz integration range.

Note 2: Measured using a Wavecrest SIA-3000.

UPPLY

OLTAGE

& F

REQUENCY

CCURACY

3.3V

2.5V / 3.3V

±50

ppm

100 ppm

50 ppm

100 ppm

ICS8Mx4 Datasheet Rev A

I n t e g r a t e d C i r c u i t S y s t e m s, I n c .

●

Revised 30Nov2004

Networking & Communications

●

w w w. i c s t . c o m

●

tel (508) 852-5400

•

Stable, ultra low jitter, LVDS clock generation

•

For Gigabit Ethernet, Fibre Channel, PCI-Express,

other applications

•

Clock output frequencies from 75 to 750 MHz

•

One differential LVDS clock output

•

Output Enable

(OE)

(tri-state – with ultra low current – when low)

•

Small 6-pin 5 x 7 x 1.5mm SMT ceramic package

•

Low profile package allows back-side PCB mounting

•

Pb-free RoHS compliant (by default; no additional code required)

•

2.5V or 3.3V device power supply options

•

Commercial

(0 to +70 C) and

Industrial

(-40 to +85 C)

temperatures

•

Frequency stability of ±50 or ±100 ppm

8 M x4

(Top View)

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